I2C: Fix mxc_i2c.c problem on imx31_phycore

The problem was caused by a global variable being used early in the boot
process.

The symptoms were on imx31_phycore board, reading the environment from I2C
EEPROM didn't work correctly and causes default environment to be loaded.

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Wolfgang Denk <wd@denx.de>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Heiko Schocher <hs@denx.de>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Heiko Schocher <hs@denx.de>
Tested-by: Anatolij Gustschin <agust@denx.de>
Tested-by: Stefano Babic <sbabic@denx.de>

diff --git a/drivers/i2c/mxc_i2c.c b/drivers/i2c/mxc_i2c.c
index bf3ad956c1bcda2218d7cc5bb92572a22aa56fb0..c88ac7cf98b318e5c6706c1dbcd6febf4bce1d94 100644 (file)
--- a/drivers/i2c/mxc_i2c.c
+++ b/drivers/i2c/mxc_i2c.c
@@ -37,6 +37,7 @@
 
 #include <asm/arch/clock.h>
 #include <asm/arch/imx-regs.h>
+#include <i2c.h>
 
 struct mxc_i2c_regs {
        uint32_t        iadr;
@@ -99,16 +100,14 @@ static u16 i2c_clk_div[50][2] = {
        { 3072, 0x1E }, { 3840, 0x1F }
 };
 
-static u8 clk_div;
-
 /*
  * Calculate and set proper clock divider
  */
-static void i2c_imx_set_clk(unsigned int rate)
+static uint8_t i2c_imx_get_clk(unsigned int rate)
 {
-       struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
        unsigned int i2c_clk_rate;
        unsigned int div;
+       u8 clk_div;
 
 #if defined(CONFIG_MX31)
        struct clock_control_regs *sc_regs =
@@ -131,7 +130,7 @@ static void i2c_imx_set_clk(unsigned int rate)
                        ;
 
        /* Store divider value */
-       writeb(i2c_clk_div[clk_div][1], &i2c_regs->ifdr);
+       return clk_div;
 }
 
 /*
@@ -150,7 +149,13 @@ void i2c_reset(void)
  */
 void i2c_init(int speed, int unused)
 {
-       i2c_imx_set_clk(speed);
+       struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
+       u8 clk_idx = i2c_imx_get_clk(speed);
+       u8 idx = i2c_clk_div[clk_idx][1];
+
+       /* Store divider value */
+       writeb(idx, &i2c_regs->ifdr);
+
        i2c_reset();
 }
 
@@ -168,6 +173,13 @@ int i2c_set_bus_speed(unsigned int speed)
  */
 unsigned int i2c_get_bus_speed(void)
 {
+       struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
+       u8 clk_idx = readb(&i2c_regs->ifdr);
+       u8 clk_div;
+
+       for (clk_div = 0; i2c_clk_div[clk_div][1] != clk_idx; clk_div++)
+               ;
+
        return mxc_get_clock(MXC_IPG_PERCLK) / i2c_clk_div[clk_div][0];
 }
 
@@ -236,8 +248,12 @@ int i2c_imx_start(void)
        struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
        unsigned int temp = 0;
        int result;
+       int speed = i2c_get_bus_speed();
+       u8 clk_idx = i2c_imx_get_clk(speed);
+       u8 idx = i2c_clk_div[clk_idx][1];
 
-       writeb(i2c_clk_div[clk_div][1], &i2c_regs->ifdr);
+       /* Store divider value */
+       writeb(idx, &i2c_regs->ifdr);
 
        /* Enable I2C controller */
        writeb(0, &i2c_regs->i2sr);
@@ -310,11 +326,10 @@ int i2c_imx_set_chip_addr(uchar chip, int read)
 int i2c_imx_set_reg_addr(uint addr, int alen)
 {
        struct mxc_i2c_regs *i2c_regs = (struct mxc_i2c_regs *)I2C_BASE;
-       int ret;
-       int i;
+       int ret = 0;
 
-       for (i = 0; i < (8 * alen); i += 8) {
-               writeb((addr >> i) & 0xff, &i2c_regs->i2dr);
+       while (alen--) {
+               writeb((addr >> (alen * 8)) & 0xff, &i2c_regs->i2dr);
 
                ret = i2c_imx_trx_complete();
                if (ret)