Adding bootlimit/bootcount feature for MPC5XXX on TQM5200 Boards

Tested with TQM5200S on STK52XX.200 Board

Signed-off-by: Axel Beierlein <belatronix@web.de>

diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index ace16535ff618ce1f43b926e98029881bd5e9ecb..d87f42ca29e454af1c819fc7e5cf7e9bf268a52c 100644 (file)
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -135,3 +135,23 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 #endif
 }
 #endif
+
+#ifdef CONFIG_BOOTCOUNT_LIMIT
+
+void bootcount_store (ulong a)
+{
+     volatile ulong *save_addr = (volatile ulong *)(MPC5XXX_CDM_BRDCRMB);
+
+     *save_addr = (BOOTCOUNT_MAGIC & 0xffff0000) | a;
+}
+
+ulong bootcount_load (void)
+{
+     volatile ulong *save_addr = (volatile ulong *)(MPC5XXX_CDM_BRDCRMB);
+
+     if ((*save_addr & 0xffff0000) != (BOOTCOUNT_MAGIC & 0xffff0000))
+             return 0;
+     else
+             return (*save_addr & 0x0000ffff);
+}
+#endif /* CONFIG_BOOTCOUNT_LIMIT */

diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 992439f3b338dff4360fc1f437c19f03f66ed25d..0ba74558967a716789d88d95ce783e5c53962a12 100644 (file)
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -55,6 +55,7 @@
 #define CONFIG_PSC_CONSOLE     1       /* console is on PSC1                   */
 #define CONFIG_BAUDRATE                115200  /* ... at 115200 bps                    */
 #define CFG_BAUDRATE_TABLE     { 9600, 19200, 38400, 57600, 115200, 230400 }
+#define CONFIG_BOOTCOUNT_LIMIT 1
 
 #ifdef CONFIG_FO300
 #define CFG_DEVICE_NULLDEV             1       /* enable null device */

diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index 5d11ef0f48054208456b6e51842d4498383654b6..0f5bee574edaee4f79563b6d659d23519e9bae1f 100644 (file)
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -137,6 +137,7 @@
 /* Clock Distribution Module */
 #define MPC5XXX_CDM_JTAGID     (MPC5XXX_CDM + 0x0000)
 #define MPC5XXX_CDM_PORCFG     (MPC5XXX_CDM + 0x0004)
+#define MPC5XXX_CDM_BRDCRMB    (MPC5XXX_CDM + 0x0008)
 #define MPC5XXX_CDM_CFG                (MPC5XXX_CDM + 0x000c)
 #define MPC5XXX_CDM_48_FDC     (MPC5XXX_CDM + 0x0010)
 #define MPC5XXX_CDM_SRESET     (MPC5XXX_CDM + 0x0020)