Moves FSL_TZASC_400 and FSL_TZPC_BP147 configs to Kconfig
for LS1088A and LS2088A platforms.
Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
select SYS_FSL_SRDS_1
select SYS_FSL_SRDS_2
select FSL_TZASC_1
+ select FSL_TZASC_400
+ select FSL_TZPC_BP147
select ARCH_EARLY_INIT_R
select BOARD_EARLY_INIT_F
select SYS_I2C_MXC
select SYS_FSL_SRDS_2
select FSL_TZASC_1
select FSL_TZASC_2
+ select FSL_TZASC_400
+ select FSL_TZPC_BP147
select SYS_FSL_ERRATUM_A008336 if !TFABOOT
select SYS_FSL_ERRATUM_A008511 if !TFABOOT
select SYS_FSL_ERRATUM_A008514 if !TFABOOT
config FSL_TZASC_2
bool
+config FSL_TZASC_400
+ bool
+
+config FSL_TZPC_BP147
+ bool
endmenu
menu "Layerscape clock tree configuration"
#ifndef L1_CACHE_BYTES
#define L1_CACHE_SHIFT 6
#define L1_CACHE_BYTES BIT(L1_CACHE_SHIFT)
-#define CONFIG_FSL_TZASC_400
#endif
#define CONFIG_SYS_FSL_OCRAM_BASE 0x18000000 /* initial RAM */
#define CONFIG_SYS_FSL_NUM_CC_PLLS 3
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
#define CONFIG_GICV3
-#define CONFIG_FSL_TZPC_BP147
-#define CONFIG_FSL_TZASC_400
#define CONFIG_SYS_PAGE_SIZE 0x10000
#define SRDS_MAX_LANES 4
#define CONFIG_REMAKE_ELF
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_GICV3
-#define CONFIG_FSL_TZPC_BP147
#include <asm/arch/stream_id_lsch3.h>
#include <asm/arch/config.h>
CONFIG_FSL_SPI_INTERFACE
CONFIG_FSL_TBCLK_EXTRA_DIV
CONFIG_FSL_TRUST_ARCH_v1
-CONFIG_FSL_TZASC_400
-CONFIG_FSL_TZPC_BP147
CONFIG_FSL_USDHC
CONFIG_FSL_VIA
CONFIG_FSMC_NAND_BASE