]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: imx8mm-venice-gw73xx: add TPM device
authorTim Harvey <tharvey@gateworks.com>
Wed, 18 Oct 2023 18:33:38 +0000 (11:33 -0700)
committerFabio Estevam <festevam@gmail.com>
Wed, 13 Dec 2023 12:50:19 +0000 (09:50 -0300)
Add the TPM device found on the GW73xx revision F PCB.

This hangs off of SPI2, uses gpio1_10 as a CS and gpio1_11 as RST#.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
arch/arm/dts/imx8mm-venice-gw73xx-0x-u-boot.dtsi
arch/arm/dts/imx8mm-venice-gw73xx.dtsi

index 92e44d4ba96ba1fdc462bcbacd3772a795d19462..31f9d47bced827c1c674f09b24214ed536eab953 100644 (file)
                gpios = <9 GPIO_ACTIVE_HIGH>;
                line-name = "dio1";
        };
+
+       tpm_rst {
+               gpio-hog;
+               output-high;
+               gpios = <11 GPIO_ACTIVE_HIGH>;
+               line-name = "tpm_rst#";
+       };
 };
 
 &gpio4 {
index 244ef8d6cc688ccd0211820df60bf65e4b1320ce..7b2130dbdb21982550dbdcbb8f7dbbe16e2afcde 100644 (file)
 &ecspi2 {
        pinctrl-names = "default";
        pinctrl-0 = <&pinctrl_spi2>;
-       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
+       cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
+                  <&gpio1 10 GPIO_ACTIVE_LOW>;
        status = "okay";
+
+       tpm@1 {
+               compatible = "tcg,tpm_tis-spi";
+               reg = <0x1>;
+               spi-max-frequency = <36000000>;
+       };
 };
 
 &gpio1 {
                        MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI    0xd6
                        MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO    0xd6
                        MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13      0xd6
+                       MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10      0xd6
                >;
        };