bool "Support M5253DEMO"
select M5253
-config TARGET_M5253EVBE
- bool "Support M5253EVBE"
- select M5253
-
config TARGET_M5272C3
bool "Support M5272C3"
select M5272
source "board/freescale/m5235evb/Kconfig"
source "board/freescale/m5249evb/Kconfig"
source "board/freescale/m5253demo/Kconfig"
-source "board/freescale/m5253evbe/Kconfig"
source "board/freescale/m5272c3/Kconfig"
source "board/freescale/m5275evb/Kconfig"
source "board/freescale/m5282evb/Kconfig"
+++ /dev/null
-if TARGET_M5253EVBE
-
-config SYS_CPU
- default "mcf52x2"
-
-config SYS_BOARD
- default "m5253evbe"
-
-config SYS_VENDOR
- default "freescale"
-
-config SYS_CONFIG_NAME
- default "M5253EVBE"
-
-endif
+++ /dev/null
-M5253EVBE BOARD
-#M: Hayden Fraser <Hayden.Fraser@freescale.com>
-S: Orphan (since 2014-06)
-F: board/freescale/m5253evbe/
-F: include/configs/M5253EVBE.h
-F: configs/M5253EVBE_defconfig
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2006
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-obj-y = m5253evbe.o
+++ /dev/null
-Freescale Amadeus Plus M5253EVBE board
-======================================
-
-Hayden Fraser(Hayden.Fraser@freescale.com)
-Created 06/05/2007
-===========================================
-
-
-1. SWITCH SETTINGS
-==================
-1.1 N/A
-
-
-2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
-===========================================
-2.1. For the initial bringup, we adopted a consistent memory scheme between U-Boot and
- linux kernel, you can customize it based on your system requirements:
- SDR: 0x00000000-0x00ffffff
- SRAM0: 0x20010000-0x20017fff
- SRAM1: 0x20000000-0x2000ffff
- MBAR1: 0x10000000-0x4fffffff
- MBAR2: 0x80000000-0xCfffffff
- Flash: 0xffe00000-0xffffffff
-
-3. DEFINITIONS AND COMPILATION
-==============================
-3.1 Explanation on NEW definitions in include/configs/M5253EVBE.h
- CONFIG_MCF52x2 Processor family
- CONFIG_MCF5253 MCF5253 specific
- CONFIG_SYS_CLK Define Amadeus Plus CPU Clock
- CONFIG_SYS_MBAR MBAR base address
- CONFIG_SYS_MBAR2 MBAR2 base address
-
-3.2 Compilation
- export CROSS_COMPILE=/usr/local/freescale-coldfire-4.1-elf/bin/m68k-elf-
- cd u-boot-1-2-x
- make distclean
- make M5253EVBE_config
- make
-
-
-4. SCREEN DUMP
-==============
-4.1 U-Boot 1.2.0 (Jun 18 2007 - 18:20:00)
-
-CPU: Freescale Coldfire MCF5253 at 62 MHz
-Board: Freescale MCF5253 EVBE
-DRAM: 16 MB
-FLASH: 2 MB
-In: serial
-Out: serial
-Err: serial
-=> flinfo
-
-Bank # 1: CFI conformant FLASH (16 x 16) Size: 2 MB in 35 Sectors
- AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x49
- Erase timeout: 16384 ms, write timeout: 1 ms
-
- Sector Start Addresses:
- FFE00000 RO FFE04000 RO FFE06000 RO FFE08000 RO FFE10000 RO
- FFE20000 FFE30000 FFE40000 FFE50000 FFE60000
- FFE70000 FFE80000 FFE90000 FFEA0000 FFEB0000
- FFEC0000 FFED0000 FFEE0000 FFEF0000 FFF00000
- FFF10000 FFF20000 FFF30000 FFF40000 FFF50000
- FFF60000 FFF70000 FFF80000 FFF90000 FFFA0000
- FFFB0000 FFFC0000 FFFD0000 FFFE0000 FFFF0000
-
-=> bdinfo
-boot_params = 0x00F62F90
-memstart = 0x00000000
-memsize = 0x01000000
-flashstart = 0xFFE00000
-flashsize = 0x00200000
-flashoffset = 0x00000000
-baudrate = 19200 bps
-
-=> printenv
-bootdelay=5
-baudrate=19200
-stdin=serial
-stdout=serial
-stderr=serial
-
-Environment size: 134/8188 bytes
-=> saveenv
-Saving Environment to Flash...
-Un-Protected 1 sectors
-Erasing Flash...
-. done
-Erased 1 sectors
-Writing to Flash... done
-Protected 1 sectors
-=>
-
-5. COMPILER
------------
-To create U-Boot the CodeSourcery's version of the GNU Toolchain for the ColdFire architecture
-compiler set (freescale-coldfire-4.1-elf) from www.codesourcery.com was used.
-You can download it from:http://www.codesourcery.com/gnu_toolchains/coldfire/download.html
-
-compiler that you used - for example, codesourcery_elf requires -MQ in rules.mk, old M68K 2.95.3 just -M
-codesourcery_elf requires -MQ in rules.mk, old M68K 2.95.3 just -M
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
- * Hayden Fraser (Hayden.Fraser@freescale.com)
- */
-
-#include <common.h>
-#include <asm/immap.h>
-#include <asm/io.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-int checkboard(void)
-{
- puts("Board: ");
- puts("Freescale MCF5253 EVBE\n");
- return 0;
-};
-
-int dram_init(void)
-{
- /*
- * Check to see if the SDRAM has already been initialized
- * by a run control tool
- */
- if (!(mbar_readLong(MCFSIM_DCR) & 0x8000)) {
- u32 RC, dramsize;
-
- RC = (CONFIG_SYS_CLK / 1000000) >> 1;
- RC = (RC * 15) >> 4;
-
- /* Initialize DRAM Control Register: DCR */
- mbar_writeShort(MCFSIM_DCR, (0x8400 | RC));
- asm("nop");
-
- mbar_writeLong(MCFSIM_DACR0, 0x00002320);
- asm("nop");
-
- /* Initialize DMR0 */
- dramsize = ((CONFIG_SYS_SDRAM_SIZE << 20) - 1) & 0xFFFC0000;
- mbar_writeLong(MCFSIM_DMR0, dramsize | 1);
- asm("nop");
-
- mbar_writeLong(MCFSIM_DACR0, 0x00002328);
- asm("nop");
-
- /* Write to this block to initiate precharge */
- *(u32 *) (CONFIG_SYS_SDRAM_BASE) = 0xa5a5a5a5;
- asm("nop");
-
- /* Set RE bit in DACR */
- mbar_writeLong(MCFSIM_DACR0,
- mbar_readLong(MCFSIM_DACR0) | 0x8000);
- asm("nop");
-
- /* Wait for at least 8 auto refresh cycles to occur */
- udelay(500);
-
- /* Finish the configuration by issuing the MRS */
- mbar_writeLong(MCFSIM_DACR0,
- mbar_readLong(MCFSIM_DACR0) | 0x0040);
- asm("nop");
-
- *(u32 *) (CONFIG_SYS_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
- }
-
- gd->ram_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
-
- return 0;
-}
-
-int testdram(void)
-{
- /* TODO: XXX XXX XXX */
- printf("DRAM test not implemented!\n");
-
- return (0);
-}
-
-#ifdef CONFIG_IDE
-#include <ata.h>
-int ide_preinit(void)
-{
- return (0);
-}
-
-void ide_set_reset(int idereset)
-{
- atac_t *ata = (atac_t *) CONFIG_SYS_ATA_BASE_ADDR;
- long period;
- /* t1, t2, t3, t4, t5, t6, t9, tRD, tA */
- int piotms[5][9] = { {70, 165, 60, 30, 50, 5, 20, 0, 35}, /* PIO 0 */
- {50, 125, 45, 20, 35, 5, 15, 0, 35}, /* PIO 1 */
- {30, 100, 30, 15, 20, 5, 10, 0, 35}, /* PIO 2 */
- {30, 80, 30, 10, 20, 5, 10, 0, 35}, /* PIO 3 */
- {25, 70, 20, 10, 20, 5, 10, 0, 35} /* PIO 4 */
- };
-
- if (idereset) {
- /* control reset */
- out_8(&ata->cr, 0);
- udelay(100);
- } else {
- mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND);
-
-#define CALC_TIMING(t) (t + period - 1) / period
- period = 1000000000 / (CONFIG_SYS_CLK / 2); /* period in ns */
-
- /*ata->ton = CALC_TIMING (180); */
- out_8(&ata->t1, CALC_TIMING(piotms[2][0]));
- out_8(&ata->t2w, CALC_TIMING(piotms[2][1]));
- out_8(&ata->t2r, CALC_TIMING(piotms[2][1]));
- out_8(&ata->ta, CALC_TIMING(piotms[2][8]));
- out_8(&ata->trd, CALC_TIMING(piotms[2][7]));
- out_8(&ata->t4, CALC_TIMING(piotms[2][3]));
- out_8(&ata->t9, CALC_TIMING(piotms[2][6]));
-
- /* IORDY enable */
- out_8(&ata->cr, 0x40);
- udelay(2000);
- /* IORDY enable */
- setbits_8(&ata->cr, 0x01);
- }
-}
-#endif /* CONFIG_IDE */
+++ /dev/null
-CONFIG_M68K=y
-CONFIG_SYS_TEXT_BASE=0xFFE00000
-CONFIG_TARGET_M5253EVBE=y
-CONFIG_BOOTDELAY=5
-# CONFIG_DISPLAY_BOARDINFO is not set
-# CONFIG_CMDLINE_EDITING is not set
-# CONFIG_AUTO_COMPLETE is not set
-CONFIG_CMD_IMLS=y
-CONFIG_CMD_IDE=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_CACHE=y
-CONFIG_CMD_EXT2=y
-CONFIG_CMD_FAT=y
-CONFIG_MAC_PARTITION=y
-# CONFIG_NET is not set
-CONFIG_MTD_NOR_FLASH=y
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
- * Hayden Fraser (Hayden.Fraser@freescale.com)
- */
-
-#ifndef _M5253EVBE_H
-#define _M5253EVBE_H
-
-#define CONFIG_MCFTMR
-
-#define CONFIG_MCFUART
-#define CONFIG_SYS_UART_PORT (0)
-
-#undef CONFIG_WATCHDOG /* disable watchdog */
-
-
-/* Configuration for environment
- * Environment is embedded in u-boot in the second sector of the flash
- */
-#ifndef CONFIG_MONITOR_IS_IN_RAM
-#define CONFIG_ENV_OFFSET 0x4000
-#define CONFIG_ENV_SECT_SIZE 0x2000
-#else
-#define CONFIG_ENV_ADDR 0xffe04000
-#define CONFIG_ENV_SECT_SIZE 0x2000
-#endif
-
-#define LDS_BOARD_TEXT \
- . = DEFINED(env_offset) ? env_offset : .; \
- env/embedded.o(.text)
-
-/*
- * BOOTP options
- */
-#undef CONFIG_BOOTP_BOOTFILESIZE
-
-/*
- * Command line configuration.
- */
-
-/* ATA */
-#define CONFIG_IDE_RESET 1
-#define CONFIG_IDE_PREINIT 1
-#define CONFIG_ATAPI
-#undef CONFIG_LBA48
-
-#define CONFIG_SYS_IDE_MAXBUS 1
-#define CONFIG_SYS_IDE_MAXDEVICE 2
-
-#define CONFIG_SYS_ATA_BASE_ADDR (CONFIG_SYS_MBAR2 + 0x800)
-#define CONFIG_SYS_ATA_IDE0_OFFSET 0
-
-#define CONFIG_SYS_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */
-#define CONFIG_SYS_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
-#define CONFIG_SYS_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
-#define CONFIG_SYS_ATA_STRIDE 4 /* Interval between registers */
-
-#define CONFIG_SYS_LOAD_ADDR 0x00100000
-
-#define CONFIG_SYS_MEMTEST_START 0x400
-#define CONFIG_SYS_MEMTEST_END 0x380000
-
-#undef CONFIG_SYS_PLL_BYPASS /* bypass PLL for test purpose */
-#define CONFIG_SYS_FAST_CLK
-#ifdef CONFIG_SYS_FAST_CLK
-# define CONFIG_SYS_PLLCR 0x1243E054
-# define CONFIG_SYS_CLK 140000000
-#else
-# define CONFIG_SYS_PLLCR 0x135a4140
-# define CONFIG_SYS_CLK 70000000
-#endif
-
-/*
- * Low Level Configuration Settings
- * (address mappings, register initial values, etc.)
- * You should know what you are doing if you make changes here.
- */
-
-#define CONFIG_SYS_MBAR 0x10000000 /* Register Base Addrs */
-#define CONFIG_SYS_MBAR2 0x80000000 /* Module Base Addrs 2 */
-
-/*
- * Definitions for initial stack pointer and data area (in DPRAM)
- */
-#define CONFIG_SYS_INIT_RAM_ADDR 0x20000000
-#define CONFIG_SYS_INIT_RAM_SIZE 0x10000 /* Size of used area in internal SRAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-/*
- * Start addresses for the final memory configuration
- * (Set up by the startup code)
- * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0
- */
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_SDRAM_SIZE 8 /* SDRAM size in MB */
-
-#ifdef CONFIG_MONITOR_IS_IN_RAM
-#define CONFIG_SYS_MONITOR_BASE 0x20000
-#else
-#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400)
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN 0x40000
-#define CONFIG_SYS_MALLOC_LEN (256 << 10)
-#define CONFIG_SYS_BOOTPARAMS_LEN (64*1024)
-
-/*
- * For booting Linux, the board info and command line data
- * have to be in the first 8 MB of memory, since this is
- * the maximum mapped by the Linux kernel during initialization ??
- */
-#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + (CONFIG_SYS_SDRAM_SIZE << 20))
-#define CONFIG_SYS_BOOTM_LEN (CONFIG_SYS_SDRAM_SIZE << 20)
-
-/* FLASH organization */
-#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
-#define CONFIG_SYS_FLASH_ERASE_TOUT 1000
-
-#define CONFIG_SYS_FLASH_CFI 1
-#define CONFIG_FLASH_CFI_DRIVER 1
-#define CONFIG_SYS_FLASH_SIZE 0x200000
-#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT
-
-/* Cache Configuration */
-#define CONFIG_SYS_CACHELINE_SIZE 16
-
-#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 8)
-#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
- CONFIG_SYS_INIT_RAM_SIZE - 4)
-#define CONFIG_SYS_ICACHE_INV (CF_CACR_DCM)
-#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_FLASH_BASE | \
- CF_ADDRMASK(2) | \
- CF_ACR_EN | CF_ACR_SM_ALL)
-#define CONFIG_SYS_CACHE_ACR1 (CONFIG_SYS_SDRAM_BASE | \
- CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \
- CF_ACR_EN | CF_ACR_SM_ALL)
-#define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_CEIB | \
- CF_CACR_DBWE)
-
-/* Port configuration */
-#define CONFIG_SYS_FECI2C 0xF0
-
-#define CONFIG_SYS_CS0_BASE 0xFFE00000
-#define CONFIG_SYS_CS0_MASK 0x001F0021
-#define CONFIG_SYS_CS0_CTRL 0x00001D80
-
-/*-----------------------------------------------------------------------
- * Port configuration
- */
-#define CONFIG_SYS_GPIO_FUNC 0x00000008 /* Set gpio pins: none */
-#define CONFIG_SYS_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */
-#define CONFIG_SYS_GPIO_EN 0x00000008 /* Set gpio output enable */
-#define CONFIG_SYS_GPIO1_EN 0x00c70000 /* Set gpio output enable */
-#define CONFIG_SYS_GPIO_OUT 0x00000008 /* Set outputs to default state */
-#define CONFIG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */
-#define CONFIG_SYS_GPIO1_LED 0x00400000 /* user led */
-
-#endif /* _M5253EVB_H */
projects / u-boot.git / commitdiff