powerpc/mpc8xxx: Add x4 DDR device support

On selected platforms, x4 DDR devices can be supported. Using x4 devices may
lower the performance, but generally they are available for higher density.

Tested on MT36JSF2G72PZ-1G9E1 RDIMM.

Signed-off-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
index b5e4070414a243bab25c8f6538b174112f1fea13..bf5a6f21c1bbf44110284c3f879114574176eddb 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ctrl_regs.c
@@ -681,6 +681,7 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr,
        unsigned int odt_cfg = 0;       /* ODT configuration */
        unsigned int num_pr;            /* Number of posted refreshes */
        unsigned int slow = 0;          /* DDR will be run less than 1250 */
+       unsigned int x4_en = 0;         /* x4 DRAM enable */
        unsigned int obc_cfg;           /* On-The-Fly Burst Chop Cfg */
        unsigned int ap_en;             /* Address Parity Enable */
        unsigned int d_init;            /* DRAM data initialization */
@@ -725,6 +726,8 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr,
                ap_en = 0;
        }
 
+       x4_en = popts->x4_en ? 1 : 0;
+
 #if defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
        /* Use the DDR controller to auto initialize memory. */
        d_init = popts->ECC_init_using_memctl;
@@ -747,6 +750,7 @@ static void set_ddr_sdram_cfg_2(fsl_ddr_cfg_regs_t *ddr,
                | ((odt_cfg & 0x3) << 21)
                | ((num_pr & 0xf) << 12)
                | ((slow & 1) << 11)
+               | (x4_en << 10)
                | (qd_en << 9)
                | (unq_mrs_en << 8)
                | ((obc_cfg & 0x1) << 6)

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
index 3e7c269e4025ab09de22c4901b1bcdce71192390..b67158c0ffae8284e0863513d345d02d4f612116 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/ddr3_dimm_params.c
@@ -129,6 +129,7 @@ ddr_compute_dimm_parameters(const ddr3_spd_eeprom_t *spd,
                pdimm->ec_sdram_width = 0;
        pdimm->data_width = pdimm->primary_sdram_width
                          + pdimm->ec_sdram_width;
+       pdimm->device_width = 1 << ((spd->organization & 0x7) + 2);
 
        /* These are the types defined by the JEDEC DDR3 SPD spec */
        pdimm->mirrored_dimm = 0;

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c b/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c
index 1ed6c77150d7323f583158cff4f35cc03183649d..260fce577f33617f9daac1892f27cbb80e4030a0 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/interactive.c
@@ -205,6 +205,7 @@ static void fsl_ddr_dimm_parameters_edit(fsl_ddr_info_t *pinfo,
                DIMM_PARM(primary_sdram_width),
                DIMM_PARM(ec_sdram_width),
                DIMM_PARM(registered_dimm),
+               DIMM_PARM(device_width),
 
                DIMM_PARM(n_row_addr),
                DIMM_PARM(n_col_addr),
@@ -263,6 +264,7 @@ static void print_dimm_parameters(const dimm_params_t *pdimm)
                DIMM_PARM(primary_sdram_width),
                DIMM_PARM(ec_sdram_width),
                DIMM_PARM(registered_dimm),
+               DIMM_PARM(device_width),
 
                DIMM_PARM(n_row_addr),
                DIMM_PARM(n_col_addr),
@@ -443,6 +445,7 @@ static void fsl_ddr_options_edit(fsl_ddr_info_t *pinfo,
                CTRL_OPTIONS(twoT_en),
                CTRL_OPTIONS(threeT_en),
                CTRL_OPTIONS(ap_en),
+               CTRL_OPTIONS(x4_en),
                CTRL_OPTIONS(bstopre),
                CTRL_OPTIONS(wrlvl_override),
                CTRL_OPTIONS(wrlvl_sample),
@@ -687,6 +690,7 @@ static void print_memctl_options(const memctl_options_t *popts)
                CTRL_OPTIONS(threeT_en),
                CTRL_OPTIONS(registered_dimm_en),
                CTRL_OPTIONS(ap_en),
+               CTRL_OPTIONS(x4_en),
                CTRL_OPTIONS(bstopre),
                CTRL_OPTIONS(wrlvl_override),
                CTRL_OPTIONS(wrlvl_sample),

diff --git a/arch/powerpc/cpu/mpc8xxx/ddr/options.c b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
index 26369e09969a2856b76e0b6c66920907ffc9eb83..30cdca497e0d00dda44f665fde42cf14923e8fa0 100644 (file)
--- a/arch/powerpc/cpu/mpc8xxx/ddr/options.c
+++ b/arch/powerpc/cpu/mpc8xxx/ddr/options.c
@@ -700,6 +700,8 @@ unsigned int populate_memctl_options(int all_DIMMs_registered,
        }
 #endif
 
+       popts->x4_en = (pdimm[0].device_width == 4) ? 1 : 0;
+
        /* Choose burst length. */
 #if defined(CONFIG_FSL_DDR3)
 #if defined(CONFIG_E500MC)

diff --git a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
index ffe4db8b8aa9283dcc7a2c85d6a883bdf07bbe90..bd312ad5c58c20f0233d007f9b98c8dd2bf5333b 100644 (file)
--- a/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
+++ b/arch/powerpc/include/asm/fsl_ddr_dimm_params.h
@@ -26,6 +26,7 @@ typedef struct dimm_params_s {
        unsigned int primary_sdram_width;
        unsigned int ec_sdram_width;
        unsigned int registered_dimm;
+       unsigned int device_width;      /* x4, x8, x16 components */
 
        /* SDRAM device parameters */
        unsigned int n_row_addr;

diff --git a/arch/powerpc/include/asm/fsl_ddr_sdram.h b/arch/powerpc/include/asm/fsl_ddr_sdram.h
index 640d3297d6c89a36725eacd1413911e045d1456c..bac22fcd1d01c86e2d6e44331bbad500e1c39d7b 100644 (file)
--- a/arch/powerpc/include/asm/fsl_ddr_sdram.h
+++ b/arch/powerpc/include/asm/fsl_ddr_sdram.h
@@ -277,6 +277,7 @@ typedef struct memctl_options_s {
        unsigned int mirrored_dimm;
        unsigned int quad_rank_present;
        unsigned int ap_en;     /* address parity enable for RDIMM */
+       unsigned int x4_en;     /* enable x4 devices */
 
        /* Global Timing Parameters */
        unsigned int cas_latency_override;