]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
sunxi: H3/H5 Sync DT files from upstream Linux kernel as of next-20200108
authorChen-Yu Tsai <wens@csie.org>
Sun, 12 Jan 2020 15:36:13 +0000 (23:36 +0800)
committerJagan Teki <jagan@amarulasolutions.com>
Fri, 24 Jan 2020 17:36:49 +0000 (23:06 +0530)
Sync the device tree files and device tree header files from upstream
Linux kernel, as of 2020-01-08. The commit synced to in the sunxi repo

    98d25b0b266d Merge branch 'sunxi/dt-for-5.6' into sunxi/for-next

which is also part of next-20200108.

Changes brought in include:

  - cleanup of pinmux node names
  - addition of Security ID, MBUS, CSI, crypto engine, video codec,
    pmu, and thermal sensor device nodes for both SoCs
  - addition of deinterlacing engine device node on H3
  - cleanup of RTC device node and addition of its clocks
  - various board cleanups and improvements
    - removal of pinmux node for GPIO lines
    - cpufreq / DVFS
    - HDMI output
    - UART-based Bluetooth
    - audio codec
    - USB ports
  - new boards

Most of the changes don't concern U-boot.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
43 files changed:
arch/arm/dts/Makefile
arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts [new file with mode: 0644]
arch/arm/dts/sun50i-h5-emlid-neutis-n5-devboard.dts
arch/arm/dts/sun50i-h5-emlid-neutis-n5.dtsi
arch/arm/dts/sun50i-h5-libretech-all-h3-cc.dts
arch/arm/dts/sun50i-h5-libretech-all-h3-it.dts [new file with mode: 0644]
arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts [new file with mode: 0644]
arch/arm/dts/sun50i-h5-nanopi-neo-plus2.dts
arch/arm/dts/sun50i-h5-nanopi-neo2.dts
arch/arm/dts/sun50i-h5-orangepi-pc2.dts
arch/arm/dts/sun50i-h5-orangepi-prime.dts
arch/arm/dts/sun50i-h5-orangepi-zero-plus.dts
arch/arm/dts/sun50i-h5-orangepi-zero-plus2.dts
arch/arm/dts/sun50i-h5.dtsi
arch/arm/dts/sun8i-h2-plus-bananapi-m2-zero.dts
arch/arm/dts/sun8i-h2-plus-orangepi-r1.dts
arch/arm/dts/sun8i-h2-plus-orangepi-zero.dts
arch/arm/dts/sun8i-h3-bananapi-m2-plus-v1.2.dts [new file with mode: 0644]
arch/arm/dts/sun8i-h3-beelink-x2.dts
arch/arm/dts/sun8i-h3-emlid-neutis-n5h3-devboard.dts [new file with mode: 0644]
arch/arm/dts/sun8i-h3-emlid-neutis-n5h3.dtsi [new file with mode: 0644]
arch/arm/dts/sun8i-h3-mapleboard-mp130.dts [new file with mode: 0644]
arch/arm/dts/sun8i-h3-nanopi-duo2.dts [new file with mode: 0644]
arch/arm/dts/sun8i-h3-nanopi-m1-plus.dts
arch/arm/dts/sun8i-h3-nanopi-m1.dts
arch/arm/dts/sun8i-h3-nanopi-neo-air.dts
arch/arm/dts/sun8i-h3-nanopi.dtsi
arch/arm/dts/sun8i-h3-orangepi-2.dts
arch/arm/dts/sun8i-h3-orangepi-lite.dts
arch/arm/dts/sun8i-h3-orangepi-one.dts
arch/arm/dts/sun8i-h3-orangepi-pc.dts
arch/arm/dts/sun8i-h3-orangepi-plus.dts
arch/arm/dts/sun8i-h3-orangepi-zero-plus2.dts
arch/arm/dts/sun8i-h3-rervision-dvk.dts [new file with mode: 0644]
arch/arm/dts/sun8i-h3.dtsi
arch/arm/dts/sunxi-bananapi-m2-plus-v1.2.dtsi [new file with mode: 0644]
arch/arm/dts/sunxi-bananapi-m2-plus.dtsi
arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi [new file with mode: 0644]
arch/arm/dts/sunxi-h3-h5.dtsi
arch/arm/dts/sunxi-libretech-all-h3-cc.dtsi
arch/arm/dts/sunxi-libretech-all-h3-it.dtsi [new file with mode: 0644]
include/dt-bindings/clock/sun8i-h3-ccu.h
include/dt-bindings/reset/sun8i-h3-ccu.h

index 04a8cccda5ef924eb69eed4151e03dccf61f8481..5075038c6a6e932143c71fa7d786b2b39d7c84ad 100644 (file)
@@ -515,8 +515,12 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
        sun8i-h2-plus-orangepi-r1.dtb \
        sun8i-h2-plus-orangepi-zero.dtb \
        sun8i-h3-bananapi-m2-plus.dtb \
+       sun8i-h3-bananapi-m2-plus-v1.2.dtb \
        sun8i-h3-beelink-x2.dtb \
+       sun8i-h3-emlid-neutis-n5h3-devboard.dtb \
        sun8i-h3-libretech-all-h3-cc.dtb \
+       sun8i-h3-mapleboard-mp130.dtb \
+       sun8i-h3-nanopi-duo2.dtb \
        sun8i-h3-nanopi-m1.dtb \
        sun8i-h3-nanopi-m1-plus.dtb \
        sun8i-h3-nanopi-neo.dtb \
@@ -528,7 +532,8 @@ dtb-$(CONFIG_MACH_SUN8I_H3) += \
        sun8i-h3-orangepi-pc-plus.dtb \
        sun8i-h3-orangepi-plus.dtb \
        sun8i-h3-orangepi-plus2e.dtb \
-       sun8i-h3-orangepi-zero-plus2.dtb
+       sun8i-h3-orangepi-zero-plus2.dtb \
+       sun8i-h3-rervision-dvk.dtb
 dtb-$(CONFIG_MACH_SUN8I_R40) += \
        sun8i-r40-bananapi-m2-ultra.dtb \
        sun8i-v40-bananapi-m2-berry.dtb
@@ -538,6 +543,8 @@ dtb-$(CONFIG_MACH_SUN50I_H5) += \
        sun50i-h5-bananapi-m2-plus.dtb \
        sun50i-h5-emlid-neutis-n5-devboard.dtb \
        sun50i-h5-libretech-all-h3-cc.dtb \
+       sun50i-h5-libretech-all-h3-it.dtb \
+       sun50i-h5-libretech-all-h5-cc.dtb \
        sun50i-h5-nanopi-neo2.dtb \
        sun50i-h5-nanopi-neo-plus2.dtb \
        sun50i-h5-orangepi-zero-plus.dtb \
diff --git a/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts b/arch/arm/dts/sun50i-h5-bananapi-m2-plus-v1.2.dts
new file mode 100644 (file)
index 0000000..2e2b14c
--- /dev/null
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include <arm/sunxi-bananapi-m2-plus-v1.2.dtsi>
+
+/ {
+       model = "Banana Pi BPI-M2-Plus v1.2 H5";
+       compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun50i-h5";
+};
index 493947c9b14a30b12ff15cee9b5768e187cda036..076a0b983101ce55e8c58bd506cbbfe062e718f6 100644 (file)
@@ -1,43 +1,8 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+// Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
+
 /*
- * Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
+ * DTS for Emlid Neutis N5 Dev board.
  */
 
 /dts-v1/;
 
 / {
        model = "Emlid Neutis N5 Developer board";
-       compatible = "emlid,emlid-neutis-n5-devboard",
-               "emlid,emlid-neutis-n5",
-               "allwinner,sun50i-h5";
-
-       aliases {
-               serial0 = &uart0;
-       };
-
-       chosen {
-               stdout-path = "serial0:115200n8";
-       };
+       compatible = "emlid,neutis-n5-devboard",
+                    "emlid,neutis-n5",
+                    "allwinner,sun50i-h5";
 
        connector {
                compatible = "hdmi-connector";
                };
        };
 
-       reg_usb0_vbus: usb0-vbus {
-               compatible = "regulator-fixed";
-               regulator-name = "usb0-vbus";
-               regulator-min-microvolt = <5000000>;
-               regulator-max-microvolt = <5000000>;
-               enable-active-high;
-               gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>;   /* PL9 */
-               status = "okay";
-       };
-
        vdd_cpux: gpio-regulator {
                compatible = "regulator-gpio";
-               pinctrl-names = "default";
                regulator-name = "vdd-cpux";
                regulator-type = "voltage";
                regulator-boot-on;
                regulator-ramp-delay = <50>; /* 4ms */
                gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
                gpios-states = <0x1>;
-               states = <1100000 0x0
-                         1300000 0x1>;
+               states = <1100000 0>, <1300000 1>;
        };
 };
 
-&codec {
-       allwinner,audio-routing =
-               "Line Out", "LINEOUT",
-               "LINEIN", "Line In",
-               "MIC1", "Mic",
-               "MIC2", "Mic",
-               "Mic",  "MBIAS";
-       status = "okay";
-};
-
-&de {
-       status = "okay";
-};
-
-&ehci0 {
-       status = "okay";
+&cpu0 {
+       cpu-supply = <&vdd_cpux>;
 };
 
-&ehci1 {
-       status = "okay";
-};
-
-&ehci2 {
-       status = "okay";
-};
-
-&ehci3 {
-       status = "okay";
-};
-
-&ohci0 {
-       status = "okay";
-};
-
-&ohci1 {
-       status = "okay";
-};
-
-&ohci2 {
-       status = "okay";
-};
-
-&ohci3 {
+&codec {
        status = "okay";
 };
 
        };
 };
 
-&mmc0 {
-       vmmc-supply = <&reg_vcc3v3>;
-       bus-width = <4>;
-       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
-       status = "okay";
-};
-
-&uart0 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
-       status = "okay";
-};
-
-&usb_otg {
-       dr_mode = "otg";
-       status = "okay";
-};
-
-&usbphy {
-       usb0_id_det-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
-       usb0_vbus-supply = <&reg_usb0_vbus>;
+&i2c1 {
        status = "okay";
 };
index 8e1e37db27d67039f7fd3d01a8b4a9af2c26cc2b..6db4855843338eea00745a01738e0fb5e1c7e170 100644 (file)
@@ -1,96 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+// Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
+
 /*
- * Copyright (C) 2018 Aleksandr Aleksandrov <aleksandr.aleksandrov@emlid.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
+ * DTSI for Emlid Neutis N5 SoM.
  */
 
 /dts-v1/;
 
 #include "sun50i-h5.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-
-/ {
-       reg_vcc3v3: vcc3v3 {
-               compatible = "regulator-fixed";
-               regulator-name = "vcc3v3";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
-       };
-
-       wifi_pwrseq: wifi_pwrseq {
-               compatible = "mmc-pwrseq-simple";
-               pinctrl-names = "default";
-               reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
-               post-power-on-delay-ms = <200>;
-       };
-};
-
-&mmc1 {
-       vmmc-supply = <&reg_vcc3v3>;
-       vqmmc-supply = <&reg_vcc3v3>;
-       mmc-pwrseq = <&wifi_pwrseq>;
-       bus-width = <4>;
-       non-removable;
-       status = "okay";
-
-       brcmf: wifi@1 {
-               reg = <1>;
-               compatible = "brcm,bcm4329-fmac";
-               interrupt-parent = <&r_pio>;
-               interrupts = <0 5 IRQ_TYPE_LEVEL_LOW>;  /* PL5 */
-               interrupt-names = "host-wake";
-       };
-};
-
-&mmc2 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&mmc2_8bit_pins>;
-       vmmc-supply = <&reg_vcc3v3>;
-       bus-width = <8>;
-       non-removable;
-       cap-mmc-hw-reset;
-       status = "okay";
-};
-
-&uart1 {
-       pinctrl-names = "default";
-       pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
-       status = "okay";
-};
+#include <sunxi-h3-h5-emlid-neutis.dtsi>
index a35f77de22d87162ab0f0c6801224f79e9f0aef2..a91806618e6f8aae406e62654e7094ea86b626e0 100644 (file)
@@ -1,8 +1,6 @@
 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
-/*
- * Copyright (C) 2018 BayLibre, SAS
- * Author: Neil Armstrong <narmstrong@baylibre.com>
- */
+// Copyright (C) 2018 BayLibre, SAS
+// Author: Neil Armstrong <narmstrong@baylibre.com>
 
 /dts-v1/;
 #include "sun50i-h5.dtsi"
@@ -12,3 +10,7 @@
        model = "Libre Computer Board ALL-H3-CC H5";
        compatible = "libretech,all-h3-cc-h5", "allwinner,sun50i-h5";
 };
+
+&mmc2 {
+       mmc-ddr-3_3v;
+};
diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h3-it.dts b/arch/arm/dts/sun50i-h5-libretech-all-h3-it.dts
new file mode 100644 (file)
index 0000000..f6756d1
--- /dev/null
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2019 Chen-Yu Tsai <wens@csie.org>
+
+/dts-v1/;
+#include "sun50i-h5.dtsi"
+#include <sunxi-libretech-all-h3-it.dtsi>
+
+/ {
+       model = "Libre Computer Board ALL-H3-IT H5";
+       compatible = "libretech,all-h3-it-h5", "allwinner,sun50i-h5";
+};
diff --git a/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts b/arch/arm/dts/sun50i-h5-libretech-all-h5-cc.dts
new file mode 100644 (file)
index 0000000..df1b926
--- /dev/null
@@ -0,0 +1,61 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2020 Chen-Yu Tsai <wens@csie.org>
+
+#include "sun50i-h5-libretech-all-h3-cc.dts"
+
+/ {
+       model = "Libre Computer Board ALL-H5-CC H5";
+       compatible = "libretech,all-h5-cc-h5", "allwinner,sun50i-h5";
+
+       aliases {
+               spi0 = &spi0;
+       };
+
+       reg_gmac_3v3: gmac-3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "gmac-3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               startup-delay-us = <5000>;
+               enable-active-high;
+               gpio = <&pio 3 6 GPIO_ACTIVE_HIGH>;
+               vin-supply = <&reg_vcc5v0>;
+       };
+};
+
+&codec {
+       /* No line out; only onboard microphone */
+       allwinner,audio-routing =
+               "MIC1", "Mic",
+               "Mic",  "MBIAS";
+};
+
+/* This board has external PHY */
+&emac {
+       pinctrl-names = "default";
+       pinctrl-0 = <&emac_rgmii_pins>;
+       phy-supply = <&reg_gmac_3v3>;
+       phy-handle = <&ext_rgmii_phy>;
+       phy-mode = "rgmii";
+       /delete-property/ allwinner,leds-active-low;
+       status = "okay";
+};
+
+&external_mdio {
+       ext_rgmii_phy: ethernet-phy@1 {
+               compatible = "ethernet-phy-ieee802.3-c22";
+               reg = <1>;
+       };
+};
+
+&spi0  {
+       status = "okay";
+
+       flash@0 {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <50000000>;
+       };
+};
index 506e25ba028abc9c0b3c73b67622a8be9bf0df96..4f9ba53ffaae8999788e77e2f0ca0d5f2908255d 100644 (file)
@@ -1,45 +1,6 @@
-/*
- * Copyright (C) 2017 Antony Antony <antony@phenome.org>
- * Copyright (C) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2017 Antony Antony <antony@phenome.org>
+// Copyright (C) 2016 ARM Ltd.
 
 /dts-v1/;
 #include "sun50i-h5.dtsi"
@@ -78,7 +39,6 @@
 
        reg_gmac_3v3: gmac-3v3 {
                compatible = "regulator-fixed";
-               pinctrl-names = "default";
                regulator-name = "gmac-3v3";
                regulator-min-microvolt = <3300000>;
                regulator-max-microvolt = <3300000>;
@@ -96,7 +56,6 @@
 
        vdd_cpux: gpio-regulator {
                compatible = "regulator-gpio";
-               pinctrl-names = "default";
                regulator-name = "vdd-cpux";
                regulator-type = "voltage";
                regulator-boot-on;
                regulator-ramp-delay = <50>; /* 4ms */
                gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>;
                gpios-states = <0x1>;
-               states = <1100000 0x0
-                         1300000 0x1>;
+               states = <1100000 0>, <1300000 1>;
        };
 
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
-               pinctrl-names = "default";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
                post-power-on-delay-ms = <200>;
        };
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index cc268a69786c532f46e9d8d1ae81e9eadc24c2d0..b059e20813bdff18070601e661efcaa1029ebe1f 100644 (file)
@@ -1,44 +1,5 @@
-/*
- * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.io>
 
 /dts-v1/;
 #include "sun50i-h5.dtsi"
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index 3e0d5a9c096d37cdc878d07aadb79cee4009b972..70b5f09984218e9b0e3fb9f6df8d2d66df5dd2d5 100644 (file)
@@ -1,44 +1,5 @@
-/*
- * Copyright (C) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
 
 /dts-v1/;
 #include "sun50i-h5.dtsi"
 
 &ir {
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index b75ca4d7d00199b7972718a6dd55306ecfc01933..cb44bfa5981fd41778b2edac5e4827f7a50dad90 100644 (file)
@@ -1,47 +1,7 @@
-/*
- * Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
- *
- * Based on sun50i-h5-orangepi-pc2.dts, which is:
- *   Copyright (C) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2017 Icenowy Zheng <icenowy@aosc.xyz>
+// Based on sun50i-h5-orangepi-pc2.dts, which is:
+//   Copyright (C) 2016 ARM Ltd.
 
 /dts-v1/;
 #include "sun50i-h5.dtsi"
 
 &ir {
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index 1238de25a9691a8adc8d38f1a7011f8cf7fc72e7..ef5ca6444220336398588735482ca1b2360fadc6 100644 (file)
@@ -1,9 +1,6 @@
-/*
- * Copyright (C) 2016 ARM Ltd.
- * Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
- *
- * SPDX-License-Identifier: (GPL-2.0+ OR X11)
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
+// Copyright (C) 2018 Hauke Mehrtens <hauke@hauke-m.de>
 
 /dts-v1/;
 #include "sun50i-h5.dtsi"
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index 53c8c11620e0e32cae0642990f2c6a4e314a8683..c95a68541309c88091d905644ed65957e9ba3096 100644 (file)
@@ -1,44 +1,5 @@
-/*
- * Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This library is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This library is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
 
 /dts-v1/;
 
@@ -78,7 +39,6 @@
 
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
-               pinctrl-names = "default";
                reset-gpios = <&pio 0 9 GPIO_ACTIVE_LOW>; /* PA9 */
                post-power-on-delay-ms = <200>;
        };
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index 4e4738cab0013b05e11295f8c436f4b30656f82c..3a1c8b2efd697f4a09d548b189954a10f125bd05 100644 (file)
@@ -1,44 +1,5 @@
-/*
- * Copyright (C) 2016 ARM Ltd.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License as
- *     published by the Free Software Foundation; either version 2 of the
- *     License, or (at your option) any later version.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2016 ARM Ltd.
 
 #include <sunxi-h3-h5.dtsi>
 
                #size-cells = <0>;
 
                cpu0: cpu@0 {
-                       compatible = "arm,cortex-a53", "arm,armv8";
+                       compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <0>;
                        enable-method = "psci";
                };
 
-               cpu@1 {
-                       compatible = "arm,cortex-a53", "arm,armv8";
+               cpu1: cpu@1 {
+                       compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <1>;
                        enable-method = "psci";
                };
 
-               cpu@2 {
-                       compatible = "arm,cortex-a53", "arm,armv8";
+               cpu2: cpu@2 {
+                       compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <2>;
                        enable-method = "psci";
                };
 
-               cpu@3 {
-                       compatible = "arm,cortex-a53", "arm,armv8";
+               cpu3: cpu@3 {
+                       compatible = "arm,cortex-a53";
                        device_type = "cpu";
                        reg = <3>;
                        enable-method = "psci";
                };
        };
 
+       pmu {
+               compatible = "arm,cortex-a53-pmu",
+                            "arm,armv8-pmuv3";
+               interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+       };
+
        psci {
                compatible = "arm,psci-0.2";
                method = "smc";
                             <GIC_PPI 10
                                (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
        };
+
+       soc {
+               syscon: system-control@1c00000 {
+                       compatible = "allwinner,sun50i-h5-system-control";
+                       reg = <0x01c00000 0x1000>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges;
+
+                       sram_c1: sram@18000 {
+                               compatible = "mmio-sram";
+                               reg = <0x00018000 0x1c000>;
+                               #address-cells = <1>;
+                               #size-cells = <1>;
+                               ranges = <0 0x00018000 0x1c000>;
+
+                               ve_sram: sram-section@0 {
+                                       compatible = "allwinner,sun50i-h5-sram-c1",
+                                                    "allwinner,sun4i-a10-sram-c1";
+                                       reg = <0x000000 0x1c000>;
+                               };
+                       };
+               };
+
+               video-codec@1c0e000 {
+                       compatible = "allwinner,sun50i-h5-video-engine";
+                       reg = <0x01c0e000 0x1000>;
+                       clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+                                <&ccu CLK_DRAM_VE>;
+                       clock-names = "ahb", "mod", "ram";
+                       resets = <&ccu RST_BUS_VE>;
+                       interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+                       allwinner,sram = <&ve_sram 1>;
+               };
+
+               crypto: crypto@1c15000 {
+                       compatible = "allwinner,sun50i-h5-crypto";
+                       reg = <0x01c15000 0x1000>;
+                       interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
+                       clock-names = "bus", "mod";
+                       resets = <&ccu RST_BUS_CE>;
+               };
+
+               mali: gpu@1e80000 {
+                       compatible = "allwinner,sun50i-h5-mali", "arm,mali-450";
+                       reg = <0x01e80000 0x30000>;
+                       /*
+                        * While the datasheet lists an interrupt for the
+                        * PMU, the actual silicon does not have the PMU
+                        * block. Reads all return zero, and writes are
+                        * ignored.
+                        */
+                       interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>,
+                                    <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+                       interrupt-names = "gp",
+                                         "gpmmu",
+                                         "pp",
+                                         "pp0",
+                                         "ppmmu0",
+                                         "pp1",
+                                         "ppmmu1",
+                                         "pp2",
+                                         "ppmmu2",
+                                         "pp3",
+                                         "ppmmu3",
+                                         "pmu";
+                       clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+                       clock-names = "bus", "core";
+                       resets = <&ccu RST_BUS_GPU>;
+
+                       assigned-clocks = <&ccu CLK_GPU>;
+                       assigned-clock-rates = <384000000>;
+               };
+
+               ths: thermal-sensor@1c25000 {
+                       compatible = "allwinner,sun50i-h5-ths";
+                       reg = <0x01c25000 0x400>;
+                       interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&ccu RST_BUS_THS>;
+                       clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+                       clock-names = "bus", "mod";
+                       nvmem-cells = <&ths_calibration>;
+                       nvmem-cell-names = "calibration";
+                       #thermal-sensor-cells = <1>;
+               };
+       };
+
+       thermal-zones {
+               cpu_thermal: cpu-thermal {
+                       polling-delay-passive = <0>;
+                       polling-delay = <0>;
+                       thermal-sensors = <&ths 0>;
+               };
+
+               gpu_thermal {
+                       polling-delay-passive = <0>;
+                       polling-delay = <0>;
+                       thermal-sensors = <&ths 1>;
+               };
+       };
 };
 
 &ccu {
                     <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
        compatible = "allwinner,sun50i-h5-pinctrl";
 };
+
+&rtc {
+       compatible = "allwinner,sun50i-h5-rtc";
+};
+
+&sid {
+       compatible = "allwinner,sun50i-h5-sid";
+};
index 7d01f9322658611e351d3d1c9c6c2ca793ad3597..d277d043031b230f9de1e3f22da70ba7c69db760 100644 (file)
@@ -28,7 +28,6 @@
 
        leds {
                compatible = "gpio-leds";
-               pinctrl-names = "default";
 
                pwr_led {
                        label = "bananapi-m2-zero:red:pwr";
@@ -39,7 +38,6 @@
 
        gpio_keys {
                compatible = "gpio-keys";
-               pinctrl-names = "default";
 
                sw4 {
                        label = "power";
                };
        };
 
+       reg_vdd_cpux: vdd-cpux-regulator {
+               compatible = "regulator-gpio";
+               regulator-name = "vdd-cpux";
+               regulator-type = "voltage";
+               regulator-boot-on;
+               regulator-always-on;
+               regulator-min-microvolt = <1100000>;
+               regulator-max-microvolt = <1300000>;
+               regulator-ramp-delay = <50>; /* 4ms */
+
+               gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
+               enable-active-high;
+               gpios-states = <0x1>;
+               states = <1100000 0>, <1300000 1>;
+       };
+
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
-               pinctrl-names = "default";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+               clocks = <&rtc 1>;
+               clock-names = "ext_clock";
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
 &ehci0 {
        status = "okay";
 };
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
 &uart1 {
        pinctrl-names = "default";
        pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+       uart-has-rtscts;
        status = "okay";
+
+       bluetooth {
+               compatible = "brcm,bcm43438-bt";
+               clocks = <&rtc 1>;
+               clock-names = "lpo";
+               vbat-supply = <&reg_vcc3v3>;
+               vddio-supply = <&reg_vcc3v3>;
+               device-wakeup-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+               host-wakeup-gpios = <&pio 6 11 GPIO_ACTIVE_HIGH>; /* PG11 */
+               shutdown-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+       };
+
 };
 
 &usb_otg {
index c652ac3b712c46efa9c0f68bca93cb7271011eea..3356f4210d45b4e055d61f29ef72fad0238045fc 100644 (file)
@@ -68,7 +68,6 @@
        };
 };
 
-/*
 &spi0 {
        status = "okay";
 
@@ -76,7 +75,6 @@
                compatible = "mxicy,mx25l12805d", "jedec,spi-nor";
        };
 };
-*/
 
 &ohci1 {
        /*
index 0bc031fe4c56b5a234f73bafd1919ef81d613f54..f19ed981da9d92d4b842fcb799bb1681d173e266 100644 (file)
                gpio = <&pio 0 20 GPIO_ACTIVE_HIGH>;
        };
 
+       reg_vdd_cpux: vdd-cpux-regulator {
+               compatible = "regulator-gpio";
+               regulator-name = "vdd-cpux";
+               regulator-type = "voltage";
+               regulator-boot-on;
+               regulator-always-on;
+               regulator-min-microvolt = <1100000>;
+               regulator-max-microvolt = <1300000>;
+               regulator-ramp-delay = <50>; /* 4ms */
+
+               gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+               enable-active-high;
+               gpios-states = <1>;
+               states = <1100000 0>, <1300000 1>;
+       };
+
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>;
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
 &ehci0 {
        status = "okay";
 };
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
diff --git a/arch/arm/dts/sun8i-h3-bananapi-m2-plus-v1.2.dts b/arch/arm/dts/sun8i-h3-bananapi-m2-plus-v1.2.dts
new file mode 100644 (file)
index 0000000..fc4a8c3
--- /dev/null
@@ -0,0 +1,13 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-bananapi-m2-plus-v1.2.dtsi"
+
+/ {
+       model = "Banana Pi BPI-M2-Plus v1.2 H3";
+       compatible = "bananapi,bpi-m2-plus-v1.2", "allwinner,sun8i-h3";
+};
index 25540b7694d590dea1c3c54c5453d4a7217d9f37..45a24441ff182bf2f78d238adbd2f70520404913 100644 (file)
@@ -90,6 +90,8 @@
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+               clocks = <&rtc 1>;
+               clock-names = "ext_clock";
        };
 
        sound_spdif {
 };
 
 &ir {
+       linux,rc-map-name = "rc-tanix-tx3mini";
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
 
 &mmc1 {
        vmmc-supply = <&reg_vcc3v3>;
+       vqmmc-supply = <&reg_vcc3v3>;
+       mmc-pwrseq = <&wifi_pwrseq>;
        bus-width = <4>;
        non-removable;
        status = "okay";
 
 &spdif {
        pinctrl-names = "default";
-       pinctrl-0 = <&spdif_tx_pins_a>;
+       pinctrl-0 = <&spdif_tx_pin>;
        status = "okay";
 };
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
diff --git a/arch/arm/dts/sun8i-h3-emlid-neutis-n5h3-devboard.dts b/arch/arm/dts/sun8i-h3-emlid-neutis-n5h3-devboard.dts
new file mode 100644 (file)
index 0000000..02fbe00
--- /dev/null
@@ -0,0 +1,72 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * DTS for Emlid Neutis N5 Dev board.
+ *
+ * Copyright (C) 2019 Georgii Staroselskii <georgiii.staroselskii@emlid.com>
+ */
+
+/dts-v1/;
+
+#include "sun8i-h3-emlid-neutis-n5h3.dtsi"
+
+/ {
+       model = "Emlid Neutis N5H3 Developer board";
+       compatible = "emlid,neutis-n5h3-devboard",
+                    "emlid,neutis-n5h3",
+                    "allwinner,sun8i-h3";
+
+       vdd_cpux: gpio-regulator {
+               compatible = "regulator-gpio";
+               regulator-name = "vdd-cpux";
+               regulator-type = "voltage";
+               regulator-boot-on;
+               regulator-always-on;
+               regulator-min-microvolt = <1100000>;
+               regulator-max-microvolt = <1300000>;
+               regulator-ramp-delay = <50>; /* 4ms */
+               gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+               gpios-states = <0x1>;
+               states = <1100000 0x0>, <1300000 0x1>;
+       };
+
+       connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+
+};
+
+&cpu0 {
+       cpu-supply = <&vdd_cpux>;
+};
+
+&codec {
+       status = "okay";
+};
+
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
+&hdmi {
+       status = "okay";
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
+&i2c1 {
+       status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-h3-emlid-neutis-n5h3.dtsi b/arch/arm/dts/sun8i-h3-emlid-neutis-n5h3.dtsi
new file mode 100644 (file)
index 0000000..3f5c63e
--- /dev/null
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * DTSI for Emlid Neutis N5 SoM.
+ *
+ * Copyright (C) 2019 Georgii Staroselskii <georgii.staroselskii@emlid.com>
+ */
+
+/dts-v1/;
+
+#include "sun8i-h3.dtsi"
+#include <sunxi-h3-h5-emlid-neutis.dtsi>
diff --git a/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts b/arch/arm/dts/sun8i-h3-mapleboard-mp130.dts
new file mode 100644 (file)
index 0000000..ff0a7a9
--- /dev/null
@@ -0,0 +1,152 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2017 Centrum Embedded Systems, Jia-Bin Huang <jb@ces.com.tw>
+ * Copyright (C) 2018 Jonathan McDowell <noodles@earth.li>
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "MapleBoard MP130";
+       compatible = "mapleboard,mp130", "allwinner,sun8i-h3";
+
+       aliases {
+               ethernet0 = &emac;
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pwr_led {
+                       label = "mp130:orange:pwr";
+                       gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>;
+                       default-state = "on";
+               };
+
+               status_led {
+                       label = "mp130:orange:status";
+                       gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>;
+               };
+       };
+
+       r_gpio_keys {
+               compatible = "gpio-keys";
+
+               power {
+                       label = "power";
+                       linux,code = <KEY_POWER>;
+                       gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
+               };
+
+               user {
+                       label = "user";
+                       linux,code = <BTN_0>;
+                       gpios = <&r_pio 0 4 GPIO_ACTIVE_LOW>;
+               };
+       };
+};
+
+&codec {
+       allwinner,audio-routing =
+               "Line Out", "LINEOUT",
+               "LINEIN", "Line In";
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&ehci2 {
+       status = "okay";
+};
+
+&ehci3 {
+       status = "okay";
+};
+
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
+&ir {
+       pinctrl-names = "default";
+       pinctrl-0 = <&r_ir_rx_pin>;
+       status = "okay";
+};
+
+&mmc0 {
+       vmmc-supply = <&reg_vcc3v3>;
+       bus-width = <4>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       status = "okay";
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_8bit_pins>;
+       vmmc-supply = <&reg_vcc3v3>;
+       bus-width = <8>;
+       non-removable;
+       cap-mmc-hw-reset;
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&ohci2 {
+       status = "okay";
+};
+
+&ohci3 {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pa_pins>;
+       status = "okay";
+};
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>;
+       status = "disabled";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+       status = "disabled";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart3_pins>;
+       status = "disabled";
+};
+
+&usb_otg {
+       dr_mode = "peripheral";
+       status = "okay";
+};
+
+&usbphy {
+       /* USB VBUS is always on */
+       status = "okay";
+};
diff --git a/arch/arm/dts/sun8i-h3-nanopi-duo2.dts b/arch/arm/dts/sun8i-h3-nanopi-duo2.dts
new file mode 100644 (file)
index 0000000..6b14927
--- /dev/null
@@ -0,0 +1,173 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Karl Palsson <karlp@tweak.net.au>
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "FriendlyARM NanoPi Duo2";
+       compatible = "friendlyarm,nanopi-duo2", "allwinner,sun8i-h3";
+
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               pwr {
+                       label = "nanopi:red:pwr";
+                       gpios = <&r_pio 0 10 GPIO_ACTIVE_HIGH>; /* PL10 */
+                       default-state = "on";
+               };
+
+               status {
+                       label = "nanopi:green:status";
+                       gpios = <&pio 0 10 GPIO_ACTIVE_HIGH>; /* PA10 */
+               };
+       };
+
+       r_gpio_keys {
+               compatible = "gpio-keys";
+
+               k1 {
+                       label = "k1";
+                       linux,code = <BTN_0>;
+                       gpios = <&r_pio 0 3 GPIO_ACTIVE_LOW>; /* PL3 */
+               };
+       };
+
+       reg_vdd_cpux: vdd-cpux-regulator {
+               compatible = "regulator-gpio";
+               regulator-name = "vdd-cpux";
+               regulator-min-microvolt = <1100000>;
+               regulator-max-microvolt = <1300000>;
+               regulator-always-on;
+               regulator-boot-on;
+               regulator-ramp-delay = <50>; /* 4ms */
+
+               enable-active-high;
+               enable-gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+               gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
+               gpios-states = <0x1>;
+               states = <1100000 0>, <1300000 1>;
+       };
+
+       reg_vcc_dram: vcc-dram {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc-dram";
+               regulator-min-microvolt = <1500000>;
+               regulator-max-microvolt = <1500000>;
+               regulator-always-on;
+               regulator-boot-on;
+               enable-active-high;
+               gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
+               vin-supply = <&reg_vcc5v0>;
+        };
+
+       reg_vdd_sys: vdd-sys {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd-sys";
+               regulator-min-microvolt = <1200000>;
+               regulator-max-microvolt = <1200000>;
+               regulator-always-on;
+               regulator-boot-on;
+               enable-active-high;
+               gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+               vin-supply = <&reg_vcc5v0>;
+        };
+
+       wifi_pwrseq: wifi_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
+               clocks = <&rtc 1>;
+               clock-names = "ext_clock";
+       };
+
+};
+
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
+&ehci0 {
+       status = "okay";
+};
+
+&mmc0 {
+       bus-width = <4>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       status = "okay";
+       vmmc-supply = <&reg_vcc3v3>;
+};
+
+&mmc1 {
+       vmmc-supply = <&reg_vcc3v3>;
+       vqmmc-supply = <&reg_vcc3v3>;
+       mmc-pwrseq = <&wifi_pwrseq>;
+       bus-width = <4>;
+       non-removable;
+       status = "okay";
+
+       sdio_wifi: sdio_wifi@1 {
+               reg = <1>;
+               compatible = "brcm,bcm4329-fmac";
+               interrupt-parent = <&pio>;
+               interrupts = <6 10 IRQ_TYPE_LEVEL_LOW>; /* PG10 / EINT10 */
+               interrupt-names = "host-wake";
+       };
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&reg_usb0_vbus {
+       gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pa_pins>;
+       status = "okay";
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>, <&uart2_rts_cts_pins>;
+       uart-has-rtscts;
+       status = "okay";
+
+       bluetooth {
+               compatible = "brcm,bcm43438-bt";
+               clocks = <&rtc 1>;
+               clock-names = "lpo";
+               vbat-supply = <&reg_vcc3v3>;
+               vddio-supply = <&reg_vcc3v3>;
+               device-wakeup-gpios = <&pio 0 8 GPIO_ACTIVE_HIGH>; /* PA8 */
+               host-wakeup-gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
+               shutdown-gpios = <&pio 6 13 GPIO_ACTIVE_HIGH>; /* PG13 */
+       };
+};
+
+&usb_otg {
+       status = "okay";
+       dr_mode = "otg";
+};
+
+&usbphy {
+       usb0_id_det-gpios = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
+       usb0_vbus-supply = <&reg_usb0_vbus>;
+       status = "okay";
+};
index 65cba1050802586aeec186a351ba7304006c8a73..4ba533b0340f220c9ce38aba9a693bcf42e8d1a4 100644 (file)
 
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
-               pinctrl-names = "default";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
        };
+
+       connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+};
+
+&de {
+       status = "okay";
 };
 
 &ehci1 {
        };
 };
 
+&hdmi {
+       status = "okay";
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
 &ir {
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
index 9412668bb8881cf4e4f5aa700e209da1aa1a6eac..69243dcb30a61782c56b4217ff9e06685ccfcec2 100644 (file)
@@ -93,7 +93,7 @@
 
 &ir {
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
index 6246d3eff39dec1a149d45455b2b41604b3a463b..07867a0d569b0a3b75d19255eab48857dc712124 100644 (file)
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index f110ee3822398eae337c2e435e9a06375163754e..4df29a65316df98a243df2702e8bdb0c2d69f0e9 100644 (file)
@@ -59,8 +59,6 @@
 
        leds {
                compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&leds_npi>, <&leds_r_npi>;
 
                status {
                        label = "nanopi:blue:status";
@@ -78,8 +76,6 @@
        r_gpio_keys {
                compatible = "gpio-keys";
                input-name = "k1";
-               pinctrl-names = "default";
-               pinctrl-0 = <&sw_r_npi>;
 
                k1 {
                        label = "k1";
        status = "okay";
 };
 
-&pio {
-       leds_npi: led_pins {
-               pins = "PA10";
-               function = "gpio_out";
-       };
-};
-
-&r_pio {
-       leds_r_npi: led_pins {
-               pins = "PL10";
-               function = "gpio_out";
-       };
-
-       sw_r_npi: key_pins {
-               pins = "PL3";
-               function = "gpio_in";
-       };
-};
-
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index f1fc6bdca8be711d0ba0b03fc22c551754db1f92..597c425d08ecd96e10f6766adeb4a9a62f867eca 100644 (file)
@@ -75,8 +75,6 @@
 
        leds {
                compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
 
                status_led {
                        label = "orangepi:red:status";
@@ -92,8 +90,6 @@
 
        r_gpio_keys {
                compatible = "gpio-keys";
-               pinctrl-names = "default";
-               pinctrl-0 = <&sw_r_opc>;
 
                sw2 {
                        label = "sw2";
 
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
-               pinctrl-names = "default";
-               pinctrl-0 = <&wifi_pwrseq_pin_orangepi>;
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 WIFI_EN */
        };
 };
 
 &ir {
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
        };
 };
 
-&pio {
-       leds_opc: led_pins {
-               pins = "PA15";
-               function = "gpio_out";
-       };
-};
-
-&r_pio {
-       leds_r_opc: led_pins {
-               pins = "PL10";
-               function = "gpio_out";
-       };
-
-       sw_r_opc: key_pins {
-               pins = "PL3", "PL4";
-               function = "gpio_in";
-       };
-
-       wifi_pwrseq_pin_orangepi: wifi_pwrseq_pin {
-               pins = "PL7";
-               function = "gpio_out";
-       };
-};
-
 &reg_usb1_vbus {
        gpio = <&pio 6 13 GPIO_ACTIVE_HIGH>;
        status = "okay";
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index 476ae8e387ca2ba3f7223213ffa1f4adbae88203..6f9c97add54e686898b53d4a2a4cc6e2f1332ecf 100644 (file)
@@ -74,8 +74,6 @@
 
        leds {
                compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
 
                pwr_led {
                        label = "orangepi:green:pwr";
@@ -91,8 +89,6 @@
 
        r_gpio_keys {
                compatible = "gpio-keys";
-               pinctrl-names = "default";
-               pinctrl-0 = <&sw_r_opc>;
 
                sw4 {
                        label = "sw4";
 
 &ir {
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
        status = "okay";
 };
 
-&pio {
-       leds_opc: led_pins {
-               pins = "PA15";
-               function = "gpio_out";
-       };
-};
-
-&r_pio {
-       leds_r_opc: led_pins {
-               pins = "PL10";
-               function = "gpio_out";
-       };
-
-       sw_r_opc: key_pins {
-               pins = "PL3";
-               function = "gpio_in";
-       };
-};
-
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index 245fd658defbc698bf5f77fe96d8e946c37851b3..4759ba3f2986e031d4eb21669cd33cad1134d3bd 100644 (file)
@@ -73,8 +73,6 @@
 
        leds {
                compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
 
                pwr_led {
                        label = "orangepi:green:pwr";
@@ -90,8 +88,6 @@
 
        r_gpio_keys {
                compatible = "gpio-keys";
-               pinctrl-names = "default";
-               pinctrl-0 = <&sw_r_opc>;
 
                sw4 {
                        label = "sw4";
                gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */
                enable-active-high;
                gpios-states = <0x1>;
-               states = <1100000 0x0
-                         1300000 0x1>;
+               states = <1100000 0>, <1300000 1>;
        };
 };
 
        status = "okay";
 };
 
-&pio {
-       leds_opc: led_pins {
-               pins = "PA15";
-               function = "gpio_out";
-       };
-};
-
-&r_pio {
-       leds_r_opc: led_pins {
-               pins = "PL10";
-               function = "gpio_out";
-       };
-
-       sw_r_opc: key_pins {
-               pins = "PL3";
-               function = "gpio_in";
-       };
-};
-
 &reg_usb0_vbus {
        gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
        status = "okay";
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index 46240334128f29bf24e79650d514ad8e1b27c1af..5aff8ecc66cbb9510571b24224cf8313e9fa9fee 100644 (file)
@@ -73,8 +73,6 @@
 
        leds {
                compatible = "gpio-leds";
-               pinctrl-names = "default";
-               pinctrl-0 = <&leds_opc>, <&leds_r_opc>;
 
                pwr_led {
                        label = "orangepi:green:pwr";
@@ -90,8 +88,6 @@
 
        r_gpio_keys {
                compatible = "gpio-keys";
-               pinctrl-names = "default";
-               pinctrl-0 = <&sw_r_opc>;
 
                sw4 {
                        label = "sw4";
 
 &ir {
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
        status = "okay";
 };
 
-&pio {
-       leds_opc: led_pins {
-               pins = "PA15";
-               function = "gpio_out";
-       };
-};
-
 &r_i2c {
        status = "okay";
 
        };
 };
 
-&r_pio {
-       leds_r_opc: led_pins {
-               pins = "PL10";
-               function = "gpio_out";
-       };
-
-       sw_r_opc: key_pins {
-               pins = "PL3";
-               function = "gpio_in";
-       };
-};
-
 &reg_usb0_vbus {
        gpio = <&r_pio 0 2 GPIO_ACTIVE_HIGH>; /* PL2 */
        status = "okay";
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
index b403e5d787cb041350e5ad7c40c63235676b9032..97f497854e05d26819a692139f0a1e336c8de9a1 100644 (file)
@@ -63,8 +63,6 @@
 
        reg_usb3_vbus: usb3-vbus {
                compatible = "regulator-fixed";
-               pinctrl-names = "default";
-               pinctrl-0 = <&usb3_vbus_pin_a>;
                regulator-name = "usb3-vbus";
                regulator-min-microvolt = <5000000>;
                regulator-max-microvolt = <5000000>;
        };
 };
 
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
 &ehci3 {
        status = "okay";
 };
        bias-pull-up;
 };
 
-&pio {
-       usb3_vbus_pin_a: usb3_vbus_pin {
-               pins = "PG11";
-               function = "gpio_out";
+&r_i2c {
+       status = "okay";
+
+       reg_vdd_cpux: regulator@65 {
+               compatible = "silergy,sy8106a";
+               reg = <0x65>;
+               regulator-name = "vdd-cpux";
+               silergy,fixed-microvolt = <1200000>;
+               regulator-min-microvolt = <1000000>;
+               regulator-max-microvolt = <1400000>;
+               regulator-ramp-delay = <200>;
+               regulator-boot-on;
+               regulator-always-on;
        };
 };
 
index f2f7b7a92571b0a0af56bca0fc0fc19249898b28..b8f46e2802fd31c5a127a961c3c7693244dee1e3 100644 (file)
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
diff --git a/arch/arm/dts/sun8i-h3-rervision-dvk.dts b/arch/arm/dts/sun8i-h3-rervision-dvk.dts
new file mode 100644 (file)
index 0000000..4738f3a
--- /dev/null
@@ -0,0 +1,114 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Bootlin
+ * Author: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
+ */
+
+/dts-v1/;
+#include "sun8i-h3.dtsi"
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       model = "RerVision H3-DVK";
+       compatible = "rervision,h3-dvk", "allwinner,sun8i-h3";
+
+       aliases {
+               ethernet0 = &emac;
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+};
+
+&de {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&ehci2 {
+       status = "okay";
+};
+
+&ehci3 {
+       status = "okay";
+};
+
+&emac {
+       phy-handle = <&int_mii_phy>;
+       phy-mode = "mii";
+       allwinner,leds-active-low;
+       status = "okay";
+};
+
+&hdmi {
+       status = "okay";
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
+&mmc0 {
+       bus-width = <4>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       status = "okay";
+       vmmc-supply = <&reg_vcc3v3>;
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_8bit_pins>;
+       vmmc-supply = <&reg_vcc3v3>;
+       bus-width = <8>;
+       non-removable;
+       cap-mmc-hw-reset;
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&ohci2 {
+       status = "okay";
+};
+
+&ohci3 {
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pa_pins>;
+       status = "okay";
+};
+
+&usb_otg {
+       status = "okay";
+       dr_mode = "peripheral";
+};
+
+&usbphy {
+       status = "okay";
+};
index f0096074a46786cf36c6a824aa6a7ce8bba824ac..20217e2ca4d3a5792f22f9186c63b167a03db301 100644 (file)
                compatible = "operating-points-v2";
                opp-shared;
 
-               opp@648000000 {
+               opp-648000000 {
                        opp-hz = /bits/ 64 <648000000>;
                        opp-microvolt = <1040000 1040000 1300000>;
                        clock-latency-ns = <244144>; /* 8 32k periods */
                };
 
-               opp@816000000 {
+               opp-816000000 {
                        opp-hz = /bits/ 64 <816000000>;
                        opp-microvolt = <1100000 1100000 1300000>;
                        clock-latency-ns = <244144>; /* 8 32k periods */
                };
 
-               opp@1008000000 {
+               opp-1008000000 {
                        opp-hz = /bits/ 64 <1008000000>;
                        opp-microvolt = <1200000 1200000 1300000>;
                        clock-latency-ns = <244144>; /* 8 32k periods */
@@ -80,7 +80,7 @@
                        #cooling-cells = <2>;
                };
 
-               cpu@1 {
+               cpu1: cpu@1 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <1>;
@@ -90,7 +90,7 @@
                        #cooling-cells = <2>;
                };
 
-               cpu@2 {
+               cpu2: cpu@2 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <2>;
                        #cooling-cells = <2>;
                };
 
-               cpu@3 {
+               cpu3: cpu@3 {
                        compatible = "arm,cortex-a7";
                        device_type = "cpu";
                        reg = <3>;
                };
        };
 
+       pmu {
+               compatible = "arm,cortex-a7-pmu";
+               interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
+                            <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+       };
+
        timer {
                compatible = "arm,armv7-timer";
                interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
        };
 
        soc {
-               system-control@1c00000 {
+               deinterlace: deinterlace@1400000 {
+                       compatible = "allwinner,sun8i-h3-deinterlace";
+                       reg = <0x01400000 0x20000>;
+                       clocks = <&ccu CLK_BUS_DEINTERLACE>,
+                                <&ccu CLK_DEINTERLACE>,
+                                <&ccu CLK_DRAM_DEINTERLACE>;
+                       clock-names = "bus", "mod", "ram";
+                       resets = <&ccu RST_BUS_DEINTERLACE>;
+                       interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
+                       interconnects = <&mbus 9>;
+                       interconnect-names = "dma-mem";
+               };
+
+               syscon: system-control@1c00000 {
                        compatible = "allwinner,sun8i-h3-system-control";
-                       reg = <0x01c00000 0x30>;
+                       reg = <0x01c00000 0x1000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        ranges;
                        };
                };
 
+               video-codec@1c0e000 {
+                       compatible = "allwinner,sun8i-h3-video-engine";
+                       reg = <0x01c0e000 0x1000>;
+                       clocks = <&ccu CLK_BUS_VE>, <&ccu CLK_VE>,
+                                <&ccu CLK_DRAM_VE>;
+                       clock-names = "ahb", "mod", "ram";
+                       resets = <&ccu RST_BUS_VE>;
+                       interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+                       allwinner,sram = <&ve_sram 1>;
+               };
+
+               crypto: crypto@1c15000 {
+                       compatible = "allwinner,sun8i-h3-crypto";
+                       reg = <0x01c15000 0x1000>;
+                       interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CE>, <&ccu CLK_CE>;
+                       clock-names = "bus", "mod";
+                       resets = <&ccu RST_BUS_CE>;
+               };
+
                mali: gpu@1c40000 {
                        compatible = "allwinner,sun8i-h3-mali", "arm,mali-400";
                        reg = <0x01c40000 0x10000>;
                        assigned-clocks = <&ccu CLK_GPU>;
                        assigned-clock-rates = <384000000>;
                };
+
+               ths: thermal-sensor@1c25000 {
+                       compatible = "allwinner,sun8i-h3-ths";
+                       reg = <0x01c25000 0x400>;
+                       interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
+                       resets = <&ccu RST_BUS_THS>;
+                       clocks = <&ccu CLK_BUS_THS>, <&ccu CLK_THS>;
+                       clock-names = "bus", "mod";
+                       nvmem-cells = <&ths_calibration>;
+                       nvmem-cell-names = "calibration";
+                       #thermal-sensor-cells = <0>;
+               };
+       };
+
+       thermal-zones {
+               cpu_thermal: cpu-thermal {
+                       polling-delay-passive = <0>;
+                       polling-delay = <0>;
+                       thermal-sensors = <&ths 0>;
+               };
        };
 };
 
 &pio {
        compatible = "allwinner,sun8i-h3-pinctrl";
 };
+
+&rtc {
+       compatible = "allwinner,sun8i-h3-rtc";
+};
+
+&sid {
+       compatible = "allwinner,sun8i-h3-sid";
+};
diff --git a/arch/arm/dts/sunxi-bananapi-m2-plus-v1.2.dtsi b/arch/arm/dts/sunxi-bananapi-m2-plus-v1.2.dtsi
new file mode 100644 (file)
index 0000000..22466af
--- /dev/null
@@ -0,0 +1,30 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2018 Chen-Yu Tsai <wens@csie.org>
+ */
+
+#include "sunxi-bananapi-m2-plus.dtsi"
+
+/ {
+       /*
+        * Bananapi M2+ v1.2 uses a GPIO line to change the effective
+        * resistance on the CPU regulator's feedback pin.
+        */
+       reg_vdd_cpux: vdd-cpux {
+               compatible = "regulator-gpio";
+               regulator-name = "vdd-cpux";
+               regulator-type = "voltage";
+               regulator-boot-on;
+               regulator-always-on;
+               regulator-min-microvolt = <1100000>;
+               regulator-max-microvolt = <1300000>;
+               regulator-ramp-delay = <50>; /* 4ms */
+               gpios = <&r_pio 0 1 GPIO_ACTIVE_HIGH>; /* PL1 */
+               gpios-states = <0x1>;
+               states = <1100000 0>, <1300000 1>;
+       };
+};
+
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
index 3bed375b9c034eca066bd53ef279c8c4f624fdf5..39263e74fbb531be8b856362560328ea7d996a9f 100644 (file)
@@ -69,7 +69,6 @@
 
        leds {
                compatible = "gpio-leds";
-               pinctrl-names = "default";
 
                pwr_led {
                        label = "bananapi-m2-plus:red:pwr";
@@ -80,7 +79,6 @@
 
        gpio_keys {
                compatible = "gpio-keys";
-               pinctrl-names = "default";
 
                sw4 {
                        label = "power";
 
        wifi_pwrseq: wifi_pwrseq {
                compatible = "mmc-pwrseq-simple";
-               pinctrl-names = "default";
                reset-gpios = <&r_pio 0 7 GPIO_ACTIVE_LOW>; /* PL7 */
                clocks = <&rtc 1>;
                clock-names = "ext_clock";
 
 &ir {
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
        status = "okay";
 };
 
diff --git a/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi b/arch/arm/dts/sunxi-h3-h5-emlid-neutis.dtsi
new file mode 100644 (file)
index 0000000..fc67e30
--- /dev/null
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+/*
+ * DTSI for Emlid Neutis SoMs.
+ *
+ * Copyright (C) 2019 Georgii Staroselskii <georgii.staroselskii@emlid.com>
+ */
+
+#include "sunxi-common-regulators.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+       aliases {
+               serial0 = &uart0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       wifi_pwrseq: wifi_pwrseq {
+               compatible = "mmc-pwrseq-simple";
+               reset-gpios = <&pio 2 7 GPIO_ACTIVE_LOW>; /* PC7 */
+               post-power-on-delay-ms = <200>;
+               clocks = <&rtc 1>;
+               clock-names = "ext_clock";
+       };
+};
+
+&cpu0 {
+       cpu-supply = <&vdd_cpux>;
+};
+
+&reg_usb0_vbus {
+       gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>;   /* PL9 */
+       status = "okay";
+};
+
+
+&de {
+       status = "okay";
+};
+
+&ohci0 {
+       status = "okay";
+};
+
+&ohci1 {
+       status = "okay";
+};
+
+&ohci2 {
+       status = "okay";
+};
+
+&ohci3 {
+       status = "okay";
+};
+
+
+&ehci0 {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&ehci2 {
+       status = "okay";
+};
+
+&ehci3 {
+       status = "okay";
+};
+
+&mmc0 {
+       vmmc-supply = <&reg_vcc3v3>;
+       bus-width = <4>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       status = "okay";
+};
+
+
+&mmc1 {
+       vmmc-supply = <&reg_vcc3v3>;
+       vqmmc-supply = <&reg_vcc3v3>;
+       mmc-pwrseq = <&wifi_pwrseq>;
+       bus-width = <4>;
+       non-removable;
+       status = "okay";
+
+       brcmf: wifi@1 {
+               reg = <1>;
+               compatible = "brcm,bcm4329-fmac";
+               interrupt-parent = <&r_pio>;
+               interrupts = <0 5 IRQ_TYPE_LEVEL_LOW>;  /* PL5 */
+               interrupt-names = "host-wake";
+       };
+};
+
+&mmc2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&mmc2_8bit_pins>;
+       vmmc-supply = <&reg_vcc3v3>;
+       bus-width = <8>;
+       non-removable;
+       cap-mmc-hw-reset;
+       status = "okay";
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pa_pins>;
+       status = "okay";
+};
+
+
+&uart1 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>;
+       uart-has-rtscts;
+       status = "okay";
+
+       bluetooth {
+               compatible = "brcm,bcm43438-bt";
+               clocks = <&rtc 1>;
+               clock-names = "lpo";
+               vbat-supply = <&reg_vcc3v3>;
+               vddio-supply = <&reg_vcc3v3>;
+               shutdown-gpios = <&pio 2 4 GPIO_ACTIVE_HIGH>; /* PC4 */
+               device-wakeup-gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
+       };
+};
+
+&uart2 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart2_pins>;
+       status = "okay";
+};
+
+&uart3 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart3_pins>;
+       status = "okay";
+};
+
+&usbphy {
+       usb0_id_det-gpios = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+       usb0_vbus-supply = <&reg_usb0_vbus>;
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "otg";
+       status = "okay";
+};
+
+&codec {
+       allwinner,audio-routing =
+               "Line Out", "LINEOUT",
+               "LINEIN", "Line In",
+               "MIC1", "Mic",
+               "MIC2", "Mic",
+               "Mic",  "MBIAS";
+};
+
+&i2c0 {
+       status = "okay";
+};
index fc6131315c47ffe695a4db6cbf0f7e38a8b89221..5e9c3060aa08baed801cca8b461bd46cef60f4ea 100644 (file)
@@ -86,6 +86,7 @@
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
                        clock-frequency = <24000000>;
+                       clock-accuracy = <50000>;
                        clock-output-names = "osc24M";
                };
 
                        #clock-cells = <0>;
                        compatible = "fixed-clock";
                        clock-frequency = <32768>;
-                       clock-output-names = "osc32k";
-               };
-
-               iosc: internal-osc-clk {
-                       #clock-cells = <0>;
-                       compatible = "fixed-clock";
-                       clock-frequency = <16000000>;
-                       clock-accuracy = <300000000>;
-                       clock-output-names = "iosc";
+                       clock-accuracy = <50000>;
+                       clock-output-names = "ext_osc32k";
                };
        };
 
                compatible = "simple-bus";
                #address-cells = <1>;
                #size-cells = <1>;
+               dma-ranges;
                ranges;
 
                display_clocks: clock@1000000 {
                        /* compatible is in per SoC .dtsi file */
                        reg = <0x01000000 0x100000>;
-                       clocks = <&ccu CLK_DE>,
-                                <&ccu CLK_BUS_DE>;
-                       clock-names = "mod",
-                                     "bus";
+                       clocks = <&ccu CLK_BUS_DE>,
+                                <&ccu CLK_DE>;
+                       clock-names = "bus",
+                                     "mod";
                        resets = <&ccu RST_BUS_DE>;
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                        };
                };
 
-               syscon: syscon@1c00000 {
-                       compatible = "allwinner,sun8i-h3-system-controller",
-                               "syscon";
-                       reg = <0x01c00000 0x1000>;
-               };
-
                dma: dma-controller@1c02000 {
                        compatible = "allwinner,sun8i-h3-dma";
                        reg = <0x01c02000 0x1000>;
                        #size-cells = <0>;
                };
 
+               sid: eeprom@1c14000 {
+                       /* compatible is in per SoC .dtsi file */
+                       reg = <0x1c14000 0x400>;
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       ths_calibration: thermal-sensor-calibration@34 {
+                               reg = <0x34 4>;
+                       };
+               };
+
                usb_otg: usb@1c19000 {
                        compatible = "allwinner,sun8i-h3-musb";
                        reg = <0x01c19000 0x400>;
                        phys = <&usbphy 0>;
                        phy-names = "usb";
                        extcon = <&usbphy 0>;
+                       dr_mode = "otg";
                        status = "disabled";
                };
 
                ccu: clock@1c20000 {
                        /* compatible is in per SoC .dtsi file */
                        reg = <0x01c20000 0x400>;
-                       clocks = <&osc24M>, <&osc32k>;
+                       clocks = <&osc24M>, <&rtc 0>;
                        clock-names = "hosc", "losc";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                        reg = <0x01c20800 0x400>;
                        interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&osc32k>;
+                       clocks = <&ccu CLK_BUS_PIO>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                        interrupt-controller;
                        #interrupt-cells = <3>;
 
-                       emac_rgmii_pins: emac0 {
+                       csi_pins: csi-pins {
+                               pins = "PE0", "PE2", "PE3", "PE4", "PE5",
+                                      "PE6", "PE7", "PE8", "PE9", "PE10",
+                                      "PE11";
+                               function = "csi";
+                       };
+
+                       emac_rgmii_pins: emac-rgmii-pins {
                                pins = "PD0", "PD1", "PD2", "PD3", "PD4",
                                       "PD5", "PD7", "PD8", "PD9", "PD10",
                                       "PD12", "PD13", "PD15", "PD16", "PD17";
                                drive-strength = <40>;
                        };
 
-                       i2c0_pins: i2c0 {
+                       i2c0_pins: i2c0-pins {
                                pins = "PA11", "PA12";
                                function = "i2c0";
                        };
 
-                       i2c1_pins: i2c1 {
+                       i2c1_pins: i2c1-pins {
                                pins = "PA18", "PA19";
                                function = "i2c1";
                        };
 
-                       i2c2_pins: i2c2 {
+                       i2c2_pins: i2c2-pins {
                                pins = "PE12", "PE13";
                                function = "i2c2";
                        };
 
-                       mmc0_pins: mmc0 {
+                       mmc0_pins: mmc0-pins {
                                pins = "PF0", "PF1", "PF2", "PF3",
                                       "PF4", "PF5";
                                function = "mmc0";
                                bias-pull-up;
                        };
 
-                       mmc1_pins: mmc1 {
+                       mmc1_pins: mmc1-pins {
                                pins = "PG0", "PG1", "PG2", "PG3",
                                       "PG4", "PG5";
                                function = "mmc1";
                                bias-pull-up;
                        };
 
-                       mmc2_8bit_pins: mmc2_8bit {
+                       mmc2_8bit_pins: mmc2-8bit-pins {
                                pins = "PC5", "PC6", "PC8",
                                       "PC9", "PC10", "PC11",
                                       "PC12", "PC13", "PC14",
                                bias-pull-up;
                        };
 
-                       spdif_tx_pins_a: spdif {
+                       spdif_tx_pin: spdif-tx-pin {
                                pins = "PA17";
                                function = "spdif";
                        };
 
-                       spi0_pins: spi0 {
+                       spi0_pins: spi0-pins {
                                pins = "PC0", "PC1", "PC2", "PC3";
                                function = "spi0";
                        };
 
-                       spi1_pins: spi1 {
+                       spi1_pins: spi1-pins {
                                pins = "PA15", "PA16", "PA14", "PA13";
                                function = "spi1";
                        };
 
-                       uart0_pins_a: uart0 {
+                       uart0_pa_pins: uart0-pa-pins {
                                pins = "PA4", "PA5";
                                function = "uart0";
                        };
 
-                       uart1_pins: uart1 {
+                       uart1_pins: uart1-pins {
                                pins = "PG6", "PG7";
                                function = "uart1";
                        };
 
-                       uart1_rts_cts_pins: uart1_rts_cts {
+                       uart1_rts_cts_pins: uart1-rts-cts-pins {
                                pins = "PG8", "PG9";
                                function = "uart1";
                        };
 
-                       uart2_pins: uart2 {
+                       uart2_pins: uart2-pins {
                                pins = "PA0", "PA1";
                                function = "uart2";
                        };
 
-                       uart3_pins: uart3 {
+                       uart2_rts_cts_pins: uart2-rts-cts-pins {
+                               pins = "PA2", "PA3";
+                               function = "uart2";
+                       };
+
+                       uart3_pins: uart3-pins {
                                pins = "PA13", "PA14";
                                function = "uart3";
                        };
 
-                       uart3_rts_cts_pins: uart3_rts_cts {
+                       uart3_rts_cts_pins: uart3-rts-cts-pins {
                                pins = "PA15", "PA16";
                                function = "uart3";
                        };
                };
 
                timer@1c20c00 {
-                       compatible = "allwinner,sun4i-a10-timer";
+                       compatible = "allwinner,sun8i-a23-timer";
                        reg = <0x01c20c00 0xa0>;
                        interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                        };
                };
 
+               mbus: dram-controller@1c62000 {
+                       compatible = "allwinner,sun8i-h3-mbus";
+                       reg = <0x01c62000 0x1000>;
+                       clocks = <&ccu CLK_MBUS>;
+                       dma-ranges = <0x00000000 0x40000000 0xc0000000>;
+                       #interconnect-cells = <1>;
+               };
+
                spi0: spi@1c68000 {
                        compatible = "allwinner,sun8i-h3-spi";
                        reg = <0x01c68000 0x1000>;
                        compatible = "allwinner,sun6i-a31-wdt";
                        reg = <0x01c20ca0 0x20>;
                        interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&osc24M>;
                };
 
                spdif: spdif@1c21000 {
                        interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
                };
 
+               csi: camera@1cb0000 {
+                       compatible = "allwinner,sun8i-h3-csi";
+                       reg = <0x01cb0000 0x1000>;
+                       interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+                       clocks = <&ccu CLK_BUS_CSI>,
+                                <&ccu CLK_CSI_SCLK>,
+                                <&ccu CLK_DRAM_CSI>;
+                       clock-names = "bus", "mod", "ram";
+                       resets = <&ccu RST_BUS_CSI>;
+                       pinctrl-names = "default";
+                       pinctrl-0 = <&csi_pins>;
+                       status = "disabled";
+               };
+
                hdmi: hdmi@1ee0000 {
                        compatible = "allwinner,sun8i-h3-dw-hdmi",
                                     "allwinner,sun8i-a83t-dw-hdmi";
                        resets = <&ccu RST_BUS_HDMI1>;
                        reset-names = "ctrl";
                        phys = <&hdmi_phy>;
-                       phy-names = "hdmi-phy";
+                       phy-names = "phy";
                        status = "disabled";
 
                        ports {
                        compatible = "allwinner,sun8i-h3-hdmi-phy";
                        reg = <0x01ef0000 0x10000>;
                        clocks = <&ccu CLK_BUS_HDMI>, <&ccu CLK_HDMI_DDC>,
-                                <&ccu 6>;
+                                <&ccu CLK_PLL_VIDEO>;
                        clock-names = "bus", "mod", "pll-0";
                        resets = <&ccu RST_BUS_HDMI0>;
                        reset-names = "phy";
                };
 
                rtc: rtc@1f00000 {
-                       compatible = "allwinner,sun6i-a31-rtc";
-                       reg = <0x01f00000 0x54>;
+                       /* compatible is in per SoC .dtsi file */
+                       reg = <0x01f00000 0x400>;
                        interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
+                       clock-output-names = "osc32k", "osc32k-out", "iosc";
+                       clocks = <&osc32k>;
+                       #clock-cells = <1>;
                };
 
                r_ccu: clock@1f01400 {
                        compatible = "allwinner,sun8i-h3-r-ccu";
                        reg = <0x01f01400 0x100>;
-                       clocks = <&osc24M>, <&osc32k>, <&iosc>,
-                                <&ccu 9>;
+                       clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
+                                <&ccu CLK_PLL_PERIPH0>;
                        clock-names = "hosc", "losc", "iosc", "pll-periph";
                        #clock-cells = <1>;
                        #reset-cells = <1>;
                };
 
                ir: ir@1f02000 {
-                       compatible = "allwinner,sun5i-a13-ir";
+                       compatible = "allwinner,sun6i-a31-ir";
                        clocks = <&r_ccu CLK_APB0_IR>, <&r_ccu CLK_IR>;
                        clock-names = "apb", "ir";
                        resets = <&r_ccu RST_APB0_IR>;
                        interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
-                       reg = <0x01f02000 0x40>;
+                       reg = <0x01f02000 0x400>;
                        status = "disabled";
                };
 
                        compatible = "allwinner,sun8i-h3-r-pinctrl";
                        reg = <0x01f02c00 0x400>;
                        interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
-                       clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&osc32k>;
+                       clocks = <&r_ccu CLK_APB0_PIO>, <&osc24M>, <&rtc 0>;
                        clock-names = "apb", "hosc", "losc";
                        gpio-controller;
                        #gpio-cells = <3>;
                        interrupt-controller;
                        #interrupt-cells = <3>;
 
-                       ir_pins_a: ir {
+                       r_ir_rx_pin: r-ir-rx-pin {
                                pins = "PL11";
                                function = "s_cir_rx";
                        };
 
-                       r_i2c_pins: r-i2c {
+                       r_i2c_pins: r-i2c-pins {
                                pins = "PL0", "PL1";
                                function = "s_i2c";
                        };
index 14c8ec16d47ea1b505460cb1f141de21b56b9e52..19b3b23cfaa8673cb76648493995eb20f7d711a9 100644 (file)
                stdout-path = "serial0:115200n8";
        };
 
+       connector {
+               compatible = "hdmi-connector";
+               type = "a";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+
        leds {
                compatible = "gpio-leds";
 
@@ -44,8 +55,8 @@
        reg_vcc1v2: vcc1v2 {
                compatible = "regulator-fixed";
                regulator-name = "vcc1v2";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <1200000>;
+               regulator-max-microvolt = <1200000>;
                regulator-always-on;
                regulator-boot-on;
                vin-supply = <&reg_vcc5v0>;
        reg_vdd_cpux: vdd-cpux {
                compatible = "regulator-fixed";
                regulator-name = "vdd-cpux";
-               regulator-min-microvolt = <3300000>;
-               regulator-max-microvolt = <3300000>;
+               regulator-min-microvolt = <1200000>;
+               regulator-max-microvolt = <1200000>;
                regulator-always-on;
                regulator-boot-on;
                vin-supply = <&reg_vcc5v0>;
        };
 };
 
+&codec {
+       allwinner,audio-routing =
+               "Line Out", "LINEOUT",
+               "MIC1", "Mic",
+               "Mic",  "MBIAS";
+       status = "okay";
+};
+
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
+&de {
+       status = "okay";
+};
+
+&ehci0 {
+       status = "okay";
+};
+
 &ehci1 {
        status = "okay";
 };
        status = "okay";
 };
 
+&hdmi {
+       status = "okay";
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
 &ir {
        pinctrl-names = "default";
-       pinctrl-0 = <&ir_pins_a>;
+       pinctrl-0 = <&r_ir_rx_pin>;
        status = "okay";
 };
 
 &mmc0 {
        vmmc-supply = <&reg_vcc_io>;
        bus-width = <4>;
-       cd-gpios = <&pio 5 6 GPIO_ACTIVE_HIGH>; /* PF6 */
-       cd-inverted;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
        status = "okay";
 };
 
        status = "okay";
 };
 
+&ohci0 {
+       status = "okay";
+};
+
 &ohci1 {
        status = "okay";
 };
 
 &uart0 {
        pinctrl-names = "default";
-       pinctrl-0 = <&uart0_pins_a>;
+       pinctrl-0 = <&uart0_pa_pins>;
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "host";
        status = "okay";
 };
 
diff --git a/arch/arm/dts/sunxi-libretech-all-h3-it.dtsi b/arch/arm/dts/sunxi-libretech-all-h3-it.dtsi
new file mode 100644 (file)
index 0000000..204fba3
--- /dev/null
@@ -0,0 +1,180 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+// Copyright (C) 2019 Chen-Yu Tsai <wens@csie.org>
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+       aliases {
+               serial0 = &uart0;
+               spi0 = &spi0;
+       };
+
+       chosen {
+               stdout-path = "serial0:115200n8";
+       };
+
+       connector {
+               compatible = "hdmi-connector";
+               type = "d";
+
+               port {
+                       hdmi_con_in: endpoint {
+                               remote-endpoint = <&hdmi_out_con>;
+                       };
+               };
+       };
+
+       leds {
+               compatible = "gpio-leds";
+
+               status_led {
+                       label = "librecomputer:blue:status";
+                       gpios = <&pio 0 7 GPIO_ACTIVE_HIGH>; /* PA7 */
+               };
+       };
+
+       reg_vcc3v3: vcc3v3 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc3v3";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&reg_vcc5v0>;
+       };
+
+       /* This represents the board's 5V input */
+       reg_vcc5v0: vcc5v0 {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc5v0";
+               regulator-min-microvolt = <5000000>;
+               regulator-max-microvolt = <5000000>;
+               regulator-always-on;
+               regulator-boot-on;
+       };
+
+       reg_vcc_dram: vcc-dram {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc-dram";
+               regulator-min-microvolt = <1500000>;
+               regulator-max-microvolt = <1500000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&reg_vcc5v0>;
+               gpio = <&r_pio 0 9 GPIO_ACTIVE_HIGH>; /* PL9 */
+               enable-active-high;
+       };
+
+       reg_vcc_io: vcc-io {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc-io";
+               /* This is simply a MOSFET switch */
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&reg_vcc3v3>;
+               gpio = <&r_pio 0 5 GPIO_ACTIVE_LOW>; /* PL5 */
+       };
+
+       reg_vcc_usbwifi: vcc-usbwifi {
+               compatible = "regulator-fixed";
+               regulator-name = "vcc-usbwifi";
+               regulator-min-microvolt = <3300000>;
+               regulator-max-microvolt = <3300000>;
+               vin-supply = <&reg_vcc5v0>;
+               gpio = <&pio 6 4 GPIO_ACTIVE_HIGH>; /* PG4 */
+               enable-active-high;
+       };
+
+       reg_vdd_cpux: vdd-cpux {
+               compatible = "regulator-fixed";
+               regulator-name = "vdd-cpux";
+               regulator-min-microvolt = <1100000>;
+               regulator-max-microvolt = <1100000>;
+               regulator-always-on;
+               regulator-boot-on;
+               vin-supply = <&reg_vcc5v0>;
+               gpio = <&r_pio 0 8 GPIO_ACTIVE_HIGH>; /* PL8 */
+               enable-active-high;
+       };
+};
+
+&cpu0 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
+&cpu1 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
+&cpu2 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
+&cpu3 {
+       cpu-supply = <&reg_vdd_cpux>;
+};
+
+&de {
+       status = "okay";
+};
+
+&ehci1 {
+       status = "okay";
+};
+
+&hdmi {
+       status = "okay";
+};
+
+&hdmi_out {
+       hdmi_out_con: endpoint {
+               remote-endpoint = <&hdmi_con_in>;
+       };
+};
+
+&mmc0 {
+       vmmc-supply = <&reg_vcc_io>;
+       bus-width = <4>;
+       cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */
+       status = "okay";
+};
+
+&pio {
+       vcc-pa-supply = <&reg_vcc_io>;
+       vcc-pc-supply = <&reg_vcc_io>;
+       vcc-pd-supply = <&reg_vcc_io>;
+       vcc-pe-supply = <&reg_vcc_io>;
+       vcc-pf-supply = <&reg_vcc_io>;
+       vcc-pg-supply = <&reg_vcc_io>;
+};
+
+&r_pio {
+       vcc-pl-supply = <&reg_vcc3v3>;
+};
+
+&spi0 {
+       status = "okay";
+
+       spiflash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <50000000>;
+       };
+};
+
+&uart0 {
+       pinctrl-names = "default";
+       pinctrl-0 = <&uart0_pa_pins>;
+       status = "okay";
+};
+
+&usb_otg {
+       dr_mode = "peripheral";
+       status = "okay";
+};
+
+&usbphy {
+       usb1_vbus-supply = <&reg_vcc_usbwifi>;
+       status = "okay";
+};
index efb7ba2bd51510533006efe7f0c9f9dcb016e24c..30d2d15373a25870b47cf60e06d2d47b983fee08 100644 (file)
 #ifndef _DT_BINDINGS_CLK_SUN8I_H3_H_
 #define _DT_BINDINGS_CLK_SUN8I_H3_H_
 
+#define CLK_PLL_VIDEO          6
+
+#define CLK_PLL_PERIPH0                9
+
 #define CLK_CPUX               14
 
 #define CLK_BUS_CE             20
@@ -91,7 +95,7 @@
 #define CLK_BUS_UART1          63
 #define CLK_BUS_UART2          64
 #define CLK_BUS_UART3          65
-#define CLK_BUS_SCR            66
+#define CLK_BUS_SCR0           66
 #define CLK_BUS_EPHY           67
 #define CLK_BUS_DBG            68
 
 #define CLK_AVS                        110
 #define CLK_HDMI               111
 #define CLK_HDMI_DDC           112
-
+#define CLK_MBUS               113
 #define CLK_GPU                        114
 
+/* New clocks imported in H5 */
+#define CLK_BUS_SCR1           115
+
 #endif /* _DT_BINDINGS_CLK_SUN8I_H3_H_ */
index 6b7af80c26ec610d5db90a19efc05022340911e1..484c2a22919d7270aeaed71ec0bf3151c38fb873 100644 (file)
@@ -98,6 +98,9 @@
 #define RST_BUS_UART1          50
 #define RST_BUS_UART2          51
 #define RST_BUS_UART3          52
-#define RST_BUS_SCR            53
+#define RST_BUS_SCR0           53
+
+/* New resets imported in H5 */
+#define RST_BUS_SCR1           54
 
 #endif /* _DT_BINDINGS_RST_SUN8I_H3_H_ */