arm:exynos4:trats: Correct SDRAM configuration for trats

SDRAM setup alike to ORIGEN Dev board.

Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>

diff --git a/include/configs/trats.h b/include/configs/trats.h
index d7808aa7123770c1b227376f84f7e3d8d1dfd86e..a24e945313f474b4160c75697d6243a35652ecdd 100644 (file)
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -189,12 +189,17 @@
 
 #define CONFIG_SYS_HZ                  1000
 
-/* TRATS has 2 banks of DRAM */
-#define CONFIG_NR_DRAM_BANKS   2
-#define PHYS_SDRAM_1           CONFIG_SYS_SDRAM_BASE   /* LDDDR2 DMC 0 */
-#define PHYS_SDRAM_1_SIZE      (512 << 20)             /* 512 MB in CS 0 */
-#define PHYS_SDRAM_2           0x50000000              /* LPDDR2 DMC 1 */
-#define PHYS_SDRAM_2_SIZE      (512 << 20)             /* 512 MB in CS 0 */
+/* TRATS has 4 banks of DRAM */
+#define CONFIG_NR_DRAM_BANKS   4
+#define SDRAM_BANK_SIZE                (256UL << 20UL) /* 256 MB */
+#define PHYS_SDRAM_1           CONFIG_SYS_SDRAM_BASE
+#define PHYS_SDRAM_1_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_2           (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
+#define PHYS_SDRAM_2_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_3           (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_3_SIZE      SDRAM_BANK_SIZE
+#define PHYS_SDRAM_4           (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
+#define PHYS_SDRAM_4_SIZE      SDRAM_BANK_SIZE
 
 #define CONFIG_SYS_MEM_TOP_HIDE                (1 << 20)       /* ram console */