Merge with /home/wd/git/u-boot/jon_loeliger

diff --cc CHANGELOG
index d98b56f83760a05e8ffb76636876794c4cd26042,50a8689d05f01985643bf873ab9b32ec21881002..f1484ee05bad1eb1106fb137b1940f74f518d5ca
--- 1/CHANGELOG
--- 2/CHANGELOG
+++ b/CHANGELOG
@@@ -1,13 -1,51 +1,58 @@@
  ======================================================================
  Changes for U-Boot 1.1.3:
  ======================================================================
 -* Patch by Ron Alder, 11 July 2005
 +
+ * Patch by Jon Loeliger
+   Fix style issues primarily in 85xx and 83xx boards.
+     - C++ comments
+     - Trailing white space
+     - Indentation not by TAB
+     - Excessive amount of empty lines
+     - Trailing empty lines
+ 
 -* Patch by Jon Loeliger, 2005-07-25
++* Patch by Ron Alder, 11 Jul 2005
+     Add Xianghua Xiao and Lunsheng Wang's support for the
+     GDA MPC8540 EVAL board.
+ 
+ * Patch by Eran Liberty
+   Add support for the Freescale MPC8349ADS board.
+ 
 -* Patch by Jon Loeliger, 2005-05-05
++* Patch by Jon Loeliger, 25 Jul 2005
+   Move the TSEC driver out of cpu/mpc85xx as it will be shared
+   by the upcoming mpc83xx family as well.
+ 
 -* Patch by Jon Loeliger, 2005-Feb-10
++* Patch by Jon Loeliger, 05 May 2005
+   Implemented support for MPC8548CDS board.
+   Added DDR II support based on SPD values for MPC85xx boards.
+   This roll-up patch also includes bugfies for the previously
+   published patches:
+     DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
+ 
 -* Patch by Jon Loeliger, Kumar Gala, 2005-02-08
++* Patch by Jon Loeliger, 10 Feb 2005
+   Add config option CONFIG_HAS_FEC calling out 8540 FEC features.
+ 
 -* Patch by Jon Loeliger 2005-02-08
++* Patch by Jon Loeliger, Kumar Gala, 08 Feb 2005
+   For MPC85xxCDS:
+     Adds Relaxed Timing TRLX bit to FLASH ORx regs to allow
+     for faster flash parts.
+     Add documentation for BR/OR for FLASH.
+ 
 -* Patch by Jon Loeliger, Kumar Gala 2005-02-08
++* Patch by Jon Loeliger 08 Feb 2005
+   Determine L2 Cache size dynamically on 85XX boards.
+ 
++* Patch by Jon Loeliger, Kumar Gala 08 Feb 2005
+   - Convert the CPM2 based functionality to use new CONFIG_CPM2
+     option rather than a myriad of CONFIG_MPC8560-like variants.
+     Applies to MPC85xx and MPC8260 boards, includes stxgp3 and sbc8560.
+     Eliminates the CONFIG_MPC8560 option entirely.  Distributes the
+     new CONFIG_CPM2 option to each 8260 board.
+ 
 +* Add support for MicroSys PM856 board
 +  Patch by Josef Wagner, 03 Aug 2005
 +
 +* Minor fixes to PM854 board
 +  Patch by Josef Wagner, 03 Aug 2005
 +
  * Adjust configuration of XENIAX board
    (chip select and GPIO required for USB operation)
  

diff --cc MAKEALL
index f9340917dbc6aaaafaf1a6c0d62bb2f7df55ea7d,e221de97544ed890b7ce3145babb411aded8c7bf..2d0c096dc74c42bc987e2e19e00ff4f9310ff807
--- 1/MAKEALL
--- 2/MAKEALL
+++ b/MAKEALL
@@@ -112,9 -121,10 +121,9 @@@ LIST_83xx="       
  #########################################################################
  
  LIST_85xx="   \
-       MPC8540ADS      MPC8541CDS      MPC8555CDS      MPC8560ADS      \
-       PM854           PM856           sbc8540         sbc8560         \
-       stxgp3          TQM8540                                         \
 -
+       MPC8540ADS      MPC8540EVAL     MPC8541CDS      MPC8548CDS      \
 -      MPC8555CDS      MPC8560ADS      PM854           sbc8540         \
 -      sbc8560         stxgp3          TQM8540                         \
++      MPC8555CDS      MPC8560ADS      PM854           PM856           \
++      sbc8540         sbc8560         stxgp3          TQM8540         \
  "
  
  #########################################################################

diff --cc Makefile
Simple merge

diff --cc include/configs/PM854.h
index b3e1f5e98ee03f0df622254d017811c29ad501a4,12a71812b5bf0e0e9a867f3199b04eb479732f5b..07e3f06ac12eb3890c0df7843b769e1e8d91a479
--- 1/include/configs/PM854.h
--- 2/include/configs/PM854.h
+++ b/include/configs/PM854.h
@@@ -256,17 -252,21 +258,21 @@@
  
  #define CONFIG_MII            1       /* MII PHY management */
  #define CONFIG_MPC85XX_TSEC1  1
+ #define CONFIG_MPC85XX_TSEC1_NAME     "TSEC0"
  #define CONFIG_MPC85XX_TSEC2  1
 -#define TSEC1_PHY_ADDR                2
 -#define TSEC2_PHY_ADDR                3
+ #define CONFIG_MPC85XX_TSEC2_NAME     "TSEC1"
 +#define TSEC1_PHY_ADDR                0
 +#define TSEC2_PHY_ADDR                1
  #define TSEC1_PHYIDX          0
  #define TSEC2_PHYIDX          0
  
  #define CONFIG_MPC85XX_FEC    1
 -#define FEC_PHY_ADDR          1
+ #define CONFIG_MPC85XX_FEC_NAME               "FEC"
 +#define FEC_PHY_ADDR          3
  #define FEC_PHYIDX            0
  
- #define CONFIG_ETHPRIME               "ENET0"
+ /* Options are: TSEC[0-1] */
+ #define CONFIG_ETHPRIME               "TSEC0"
  
  #define       CONFIG_HAS_ETH1         1
  #define       CONFIG_HAS_ETH2         1