fsl-layerscape: Add workaround for PCIe erratum A010315

As the access to serders protocol unselected PCIe controller will
hang. So disable the R/W permission to unselected PCIe controller
including its CCSR, IO space and memory space according to the
serders protocol field of RCW.

Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

diff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c
index 4c93ab7fcbbebfe29487b413d5b64839daa1af00..31f00cbd69296401de7de69e54890707d29a1589 100644 (file)
--- a/arch/arm/cpu/armv7/ls102xa/soc.c
+++ b/arch/arm/cpu/armv7/ls102xa/soc.c
@@ -7,6 +7,7 @@
 #include <common.h>
 #include <asm/arch/clock.h>
 #include <asm/io.h>
+#include <asm/arch/fsl_serdes.h>
 #include <asm/arch/immap_ls102xa.h>
 #include <asm/arch/ls102xa_soc.h>
 #include <asm/arch/ls102xa_stream_id.h>
@@ -59,6 +60,19 @@ unsigned int get_soc_major_rev(void)
        return major;
 }
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void)
+{
+       int i;
+
+       for (i = PCIE1; i <= PCIE2; i++)
+               if (!is_serdes_configured(i)) {
+                       debug("PCIe%d: disabled all R/W permission!\n", i);
+                       set_pcie_ns_access(i, 0);
+               }
+}
+#endif
+
 int arch_soc_init(void)
 {
        struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;

diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index 2b39a025d953218fbbf6c996edd0713c0a3f8eab..43c4aa59a1525c45798b6d3619076de908f31e95 100644 (file)
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -8,11 +8,14 @@
 #include <fsl_ifc.h>
 #include <ahci.h>
 #include <scsi.h>
+#include <asm/arch/fsl_serdes.h>
 #include <asm/arch/soc.h>
 #include <asm/io.h>
 #include <asm/global_data.h>
 #include <asm/arch-fsl-layerscape/config.h>
+#ifdef CONFIG_LAYERSCAPE_NS_ACCESS
 #include <fsl_csu.h>
+#endif
 #ifdef CONFIG_SYS_FSL_DDR
 #include <fsl_ddr_sdram.h>
 #include <fsl_ddr.h>
@@ -301,6 +304,19 @@ void erratum_a008850_post(void)
 #endif
 }
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void)
+{
+       int i;
+
+       for (i = PCIE1; i <= PCIE4; i++)
+               if (!is_serdes_configured(i)) {
+                       debug("PCIe%d: disabled all R/W permission!\n", i);
+                       set_pcie_ns_access(i, 0);
+               }
+}
+#endif
+
 void fsl_lsch2_early_init_f(void)
 {
        struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/config.h b/arch/arm/include/asm/arch-fsl-layerscape/config.h
index 527998111f318509e44909a83506c2a146deb8e5..9ccdcfa4ecfccce85382dd169b863a92641f61ca 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/config.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/config.h
@@ -165,6 +165,8 @@
 #define CONFIG_SYS_FSL_SEC_BE
 
 #define CONFIG_SYS_FSL_SRDS_1
+
+#define CONFIG_SYS_FSL_ERRATUM_A010315
 /* SoC related */
 #ifdef CONFIG_LS1043A
 #define CONFIG_MAX_CPUS                                4

diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 8d4a7adb1d574aca4a9e3e13a8918dc0a9fc9c69..4512732f79908a24752f85f13784f619dc1b3aaf 100644 (file)
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -100,6 +100,10 @@ void cpu_name(char *name);
 void erratum_a009635(void);
 #endif
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void);
+#endif
+
 bool soc_has_dp_ddr(void);
 bool soc_has_aiop(void);
 #endif /* _ASM_ARMV8_FSL_LAYERSCAPE_SOC_H_ */

diff --git a/arch/arm/include/asm/arch-ls102xa/config.h b/arch/arm/include/asm/arch-ls102xa/config.h
index 56d8f3247f54a16707a591583e8d7e645c7aeabf..b0bf92e44c70730601dde0c26bf041337d571399 100644 (file)
--- a/arch/arm/include/asm/arch-ls102xa/config.h
+++ b/arch/arm/include/asm/arch-ls102xa/config.h
@@ -129,6 +129,7 @@
 #define CONFIG_USB_MAX_CONTROLLER_COUNT                1
 #define CONFIG_SYS_FSL_ERRATUM_A008378
 #define CONFIG_SYS_FSL_ERRATUM_A009663
+#define CONFIG_SYS_FSL_ERRATUM_A010315
 #define CONFIG_SYS_FSL_MAX_NUM_OF_SEC          1
 #else
 #error SoC not defined

diff --git a/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h b/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
index a354684bccf624301b2f51ca2f96087e2e634ed6..9c9135448ea236f705568fc3d3585465cb540c73 100644 (file)
--- a/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
+++ b/arch/arm/include/asm/arch-ls102xa/ls102xa_soc.h
@@ -11,4 +11,8 @@ unsigned int get_soc_major_rev(void);
 int arch_soc_init(void);
 int ls102xa_smmu_stream_id_init(void);
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+void erratum_a010315(void);
+#endif
+
 #endif /* __FSL_LS102XA_SOC_H */

diff --git a/board/freescale/ls1012aqds/ls1012aqds.c b/board/freescale/ls1012aqds/ls1012aqds.c
index 852d683dd8e14d255de19265895f520c2f64fc19..874c122725d45be4e8b996c19738bdc50dcf6fb3 100644 (file)
--- a/board/freescale/ls1012aqds/ls1012aqds.c
+++ b/board/freescale/ls1012aqds/ls1012aqds.c
@@ -206,6 +206,10 @@ int board_init(void)
        out_le32(&cci->ctrl_ord,
                 CCI400_CTRLORD_EN_BARRIER);
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+       erratum_a010315();
+#endif
+
 #ifdef CONFIG_ENV_IS_NOWHERE
        gd->env_addr = (ulong)&default_environment[0];
 #endif

diff --git a/board/freescale/ls1012ardb/ls1012ardb.c b/board/freescale/ls1012ardb/ls1012ardb.c
index a3748defb697bbb284a9d72746979e88135e2d00..6598ab37eec30bbe5ffc00ded3c0b816308af6ff 100644 (file)
--- a/board/freescale/ls1012ardb/ls1012ardb.c
+++ b/board/freescale/ls1012ardb/ls1012ardb.c
@@ -202,6 +202,10 @@ int board_init(void)
         */
        out_le32(&cci->ctrl_ord, CCI400_CTRLORD_EN_BARRIER);
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+       erratum_a010315();
+#endif
+
 #ifdef CONFIG_ENV_IS_NOWHERE
        gd->env_addr = (ulong)&default_environment[0];
 #endif

diff --git a/board/freescale/ls1021aqds/ls1021aqds.c b/board/freescale/ls1021aqds/ls1021aqds.c
index 291b0f4c724ecb9aa9b02b66e43a6cb86a381699..4eb38a73c901050761cced88c6498e4b2260d88e 100644 (file)
--- a/board/freescale/ls1021aqds/ls1021aqds.c
+++ b/board/freescale/ls1021aqds/ls1021aqds.c
@@ -430,6 +430,10 @@ int board_init(void)
        struct ccsr_cci400 *cci = (struct ccsr_cci400 *)CONFIG_SYS_CCI400_ADDR;
        unsigned int major;
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+       erratum_a010315();
+#endif
+
        major = get_soc_major_rev();
        if (major == SOC_MAJOR_VER_1_0) {
                /* Set CCI-400 control override register to

diff --git a/board/freescale/ls1021atwr/ls1021atwr.c b/board/freescale/ls1021atwr/ls1021atwr.c
index 85c036b36c509c7e6526ee3009ae624238b4d760..4638bed478eae8ee7acd92517ff6a6b2c864bd2a 100644 (file)
--- a/board/freescale/ls1021atwr/ls1021atwr.c
+++ b/board/freescale/ls1021atwr/ls1021atwr.c
@@ -480,6 +480,10 @@ void ls1twr_program_regulator(void)
 
 int board_init(void)
 {
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+       erratum_a010315();
+#endif
+
 #ifndef CONFIG_SYS_FSL_NO_SERDES
        fsl_serdes_init();
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)

diff --git a/board/freescale/ls1043aqds/ls1043aqds.c b/board/freescale/ls1043aqds/ls1043aqds.c
index 16425575b20e8c5880bc2c65df48cfb622fa37d8..8835a49bb508193a66559aa9412e36fb9f0198e8 100644 (file)
--- a/board/freescale/ls1043aqds/ls1043aqds.c
+++ b/board/freescale/ls1043aqds/ls1043aqds.c
@@ -308,6 +308,10 @@ int misc_init_r(void)
 
 int board_init(void)
 {
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+       erratum_a010315();
+#endif
+
        select_i2c_ch_pca9547(I2C_MUX_CH_DEFAULT);
        board_retimer_init();
 

diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 33997899ff13e6d41f82028691a7877d25544a32..e213128c1b9c270c96080f138d9d634fc27bd10f 100644 (file)
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -85,6 +85,10 @@ int board_init(void)
 {
        struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
 
+#ifdef CONFIG_SYS_FSL_ERRATUM_A010315
+       erratum_a010315();
+#endif
+
 #ifdef CONFIG_FSL_IFC
        init_final_memctl_regs();
 #endif