include/configs: Numerous typo fixes: "controler" -> "controller".

Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>

diff --git a/include/configs/B4860QDS.h b/include/configs/B4860QDS.h
index 94c8253e60d68dfec164f03899815090e02b35bb..524975183043c84ffa9295c83f589054761b8141 100644 (file)
--- a/include/configs/B4860QDS.h
+++ b/include/configs/B4860QDS.h
@@ -83,7 +83,7 @@
 #define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 

diff --git a/include/configs/BSC9132QDS.h b/include/configs/BSC9132QDS.h
index 3a733795ae2066d5c24d31fc468486b4dd5779d1..aaddfca2cd74534aea10292b27e97c8c3ddf03cd 100644 (file)
--- a/include/configs/BSC9132QDS.h
+++ b/include/configs/BSC9132QDS.h
@@ -85,7 +85,7 @@
 
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
 #if defined(CONFIG_PCI)
-#define CONFIG_PCIE1                   /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCIE1                   /* PCIE controller 1 (slot 1) */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET          /* need PCIe reset errata */

diff --git a/include/configs/C29XPCIE.h b/include/configs/C29XPCIE.h
index 4d14c8ba376934b928bfec670c84c227853691f8..1e5b501ab1abe8a5d055f4ec8379738499daeb81 100644 (file)
--- a/include/configs/C29XPCIE.h
+++ b/include/configs/C29XPCIE.h
@@ -92,7 +92,7 @@
 
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
 #ifdef CONFIG_PCI
-#define CONFIG_PCIE1                   /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCIE1                   /* PCIE controller 1 (slot 1) */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_FSL_PCIE_RESET          /* need PCIe reset errata */

diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index 8cc7f023919d43164cf39815ffd9b719704283f2..03f17f9c35ab90c1417ab04e979a1b48e491844e 100644 (file)
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -51,9 +51,9 @@
 #define CONFIG_FSL_ELBC                1       /* Has Enhanced localbus controller */
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
 #define CONFIG_PCI1            1       /* Enable PCI controller 1 */
-#define CONFIG_PCIE1           1       /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2           1       /* PCIE controler 2 (slot 2) */
-#define CONFIG_PCIE3           1       /* PCIE controler 3 (ULI bridge) */
+#define CONFIG_PCIE1           1       /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2           1       /* PCIE controller 2 (slot 2) */
+#define CONFIG_PCIE3           1       /* PCIE controller 3 (ULI bridge) */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  1       /* need PCIe reset errata */

diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 6202dffaa50ffa405c1cee0a682d2c8141bd57b0..26d92daff1d96f45b2a497bb3957ef8d2950e3b2 100644 (file)
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -25,9 +25,9 @@
 
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
 #define CONFIG_PCI1            1       /* PCI controller 1 */
-#define CONFIG_PCIE1           1       /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2           1       /* PCIE controler 2 (slot 2) */
-#define CONFIG_PCIE3           1       /* PCIE controler 3 (ULI bridge) */
+#define CONFIG_PCIE1           1       /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2           1       /* PCIE controller 2 (slot 2) */
+#define CONFIG_PCIE3           1       /* PCIE controller 3 (ULI bridge) */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  1       /* need PCIe reset errata */

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index dd07dc4fb5ed4da55548c9f5046d3e630766d080..5de8b198288c87e5d6d0f6329798f55d5f8b1947 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -34,7 +34,7 @@
 
 #define CONFIG_PCI             /* enable any pci type devices */
 #define CONFIG_PCI1            /* PCI controller 1 */
-#define CONFIG_PCIE1           /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCIE1           /* PCIE controller 1 (slot 1) */
 #undef CONFIG_PCI2
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 9144f321e09cd1ca545e14d47dc7d4104c210599..8c4e5e21ca9814eff22d40eb9fdc808bffd5f78c 100644 (file)
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -40,9 +40,9 @@
 
 #define CONFIG_FSL_ELBC                1       /* Has Enhanced localbus controller */
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           1       /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2           1       /* PCIE controler 2 (slot 2) */
-#define CONFIG_PCIE3           1       /* PCIE controler 3 (ULI bridge) */
+#define CONFIG_PCIE1           1       /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2           1       /* PCIE controller 2 (slot 2) */
+#define CONFIG_PCIE3           1       /* PCIE controller 3 (ULI bridge) */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  1       /* need PCIe reset errata */

diff --git a/include/configs/MPC8610HPCD.h b/include/configs/MPC8610HPCD.h
index 88ca4f30489d4b6a24776903faea41a20182f7f1..e7f01d00d1d7663879944dde01a69f1b477e6e2f 100644 (file)
--- a/include/configs/MPC8610HPCD.h
+++ b/include/configs/MPC8610HPCD.h
@@ -45,7 +45,7 @@
 #define CONFIG_SYS_SCRATCH_VA  0xc0000000
 
 #define CONFIG_PCI             1       /* Enable PCI/PCIE*/
-#define CONFIG_PCI1            1       /* PCI controler 1 */
+#define CONFIG_PCI1            1       /* PCI controller 1 */
 #define CONFIG_PCIE1           1       /* PCIe 1 connected to ULI bridge */
 #define CONFIG_PCIE2           1       /* PCIe 2 connected to slot */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */

diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index 3569849c52b464c6fe0f39eb645b5488d91676ff..2f94c8214eb0d6ed304a66d195594245d177bc38 100644 (file)
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -46,8 +46,8 @@
 #define CONFIG_SRIO1                   /* SRIO port 1 */
 
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           1       /* PCIE controler 1 (ULI bridge) */
-#define CONFIG_PCIE2           1       /* PCIE controler 2 (slot) */
+#define CONFIG_PCIE1           1       /* PCIE controller 1 (ULI bridge) */
+#define CONFIG_PCIE2           1       /* PCIE controller 2 (slot) */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */
 #define CONFIG_FSL_LAW         1       /* Use common FSL law init code */

diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index 5719e86f1bcf3961b06842bffea9b35fb22f0e85..f398b37f5b9cf3a2480cc531779d5700c5b1a067 100644 (file)
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -176,8 +176,8 @@
 
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
 #if defined(CONFIG_PCI)
-#define CONFIG_PCIE1                   /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2                   /* PCIE controler 2 (slot 2) */
+#define CONFIG_PCIE1                   /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2                   /* PCIE controller 2 (slot 2) */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET          /* need PCIe reset errata */

diff --git a/include/configs/P1022DS.h b/include/configs/P1022DS.h
index 8b29951c9859c4ff8ab3db1a815e53baf3e252f7..7457dfcd489df2e3719a8fc0bbab4f743d0067ab 100644 (file)
--- a/include/configs/P1022DS.h
+++ b/include/configs/P1022DS.h
@@ -134,9 +134,9 @@
 
 #define CONFIG_FSL_ELBC                        /* Has Enhanced localbus controller */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2                   /* PCIE controler 2 (slot 2) */
-#define CONFIG_PCIE3                   /* PCIE controler 3 (ULI bridge) */
+#define CONFIG_PCIE1                   /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2                   /* PCIE controller 2 (slot 2) */
+#define CONFIG_PCIE3                   /* PCIE controller 3 (ULI bridge) */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_FSL_PCIE_RESET          /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */

diff --git a/include/configs/P1023RDB.h b/include/configs/P1023RDB.h
index fcbe288472eec4e904bd85b91143df966fbd600e..a10310ec273e814a6dc21665f14cb79385b9e4af 100644 (file)
--- a/include/configs/P1023RDB.h
+++ b/include/configs/P1023RDB.h
@@ -33,9 +33,9 @@
 #define CONFIG_FSL_ELBC                /* Has Enhanced localbus controller */
 #define CONFIG_PCI             /* Enable PCI/PCIE */
 #define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
-#define CONFIG_PCIE1           /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2           /* PCIE controler 2 (slot 2) */
-#define CONFIG_PCIE3           /* PCIE controler 3 (slot 3) */
+#define CONFIG_PCIE1           /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2           /* PCIE controller 2 (slot 2) */
+#define CONFIG_PCIE3           /* PCIE controller 3 (slot 3) */
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_FSL_PCIE_RESET  /* need PCIe reset errata */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index b7a08e0a30dd7ea0a01e604ac4dbb629f5ec639a..b3fb38c63a47c5041226921bcda86770090c9c83 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -52,9 +52,9 @@
 #define CONFIG_FSL_ELBC                        /* Has Enhanced localbus controller */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
-#define CONFIG_PCIE2                   /* PCIE controler 2 */
-#define CONFIG_PCIE3                   /* PCIE controler 3 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
+#define CONFIG_PCIE2                   /* PCIE controller 2 */
+#define CONFIG_PCIE3                   /* PCIE controller 3 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 

diff --git a/include/configs/T102xQDS.h b/include/configs/T102xQDS.h
index 12260aaf62a702b9044e1a0ce0bc66872d1c6198..ef2ede49b9f8178c35d2d2ecf08195030f70be9e 100644 (file)
--- a/include/configs/T102xQDS.h
+++ b/include/configs/T102xQDS.h
@@ -577,9 +577,9 @@ unsigned long get_board_ddr_clk(void);
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
 #define CONFIG_PCI             /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           /* PCIE controler 1 */
-#define CONFIG_PCIE2           /* PCIE controler 2 */
-#define CONFIG_PCIE3           /* PCIE controler 3 */
+#define CONFIG_PCIE1           /* PCIE controller 1 */
+#define CONFIG_PCIE2           /* PCIE controller 2 */
+#define CONFIG_PCIE3           /* PCIE controller 3 */
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */
 #define CONFIG_PCI_INDIRECT_BRIDGE

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 74274cac571c1ff2b44f5e6fb673a963f3baabf5..778c64b3f0892ecee678846314c614de53062eea 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -563,11 +563,11 @@ unsigned long get_board_ddr_clk(void);
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
 #define CONFIG_PCI             /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           /* PCIE controler 1 */
-#define CONFIG_PCIE2           /* PCIE controler 2 */
-#define CONFIG_PCIE3           /* PCIE controler 3 */
+#define CONFIG_PCIE1           /* PCIE controller 1 */
+#define CONFIG_PCIE2           /* PCIE controller 2 */
+#define CONFIG_PCIE3           /* PCIE controller 3 */
 #ifdef CONFIG_PPC_T1040
-#define CONFIG_PCIE4           /* PCIE controler 4 */
+#define CONFIG_PCIE4           /* PCIE controller 4 */
 #endif
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */

diff --git a/include/configs/T1040QDS.h b/include/configs/T1040QDS.h
index 4c1175d426ea0743776d91ab2365d2454bd46ca0..be4ae712b5eec4743d4619bce30e8d858879e63a 100644 (file)
--- a/include/configs/T1040QDS.h
+++ b/include/configs/T1040QDS.h
@@ -65,10 +65,10 @@
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
 #define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
-#define CONFIG_PCIE2                   /* PCIE controler 2 */
-#define CONFIG_PCIE3                   /* PCIE controler 3 */
-#define CONFIG_PCIE4                   /* PCIE controler 4 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
+#define CONFIG_PCIE2                   /* PCIE controller 2 */
+#define CONFIG_PCIE3                   /* PCIE controller 3 */
+#define CONFIG_PCIE4                   /* PCIE controller 4 */
 
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */

diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 9a3965fa4134a876fa98991830452ce49b238acc..ed3493b68493b4b83668a2f329bf7620d5126986 100644 (file)
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -130,10 +130,10 @@ $(SRCTREE)/board/freescale/t104xrdb/t1042d4_rcw.cfg
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
 #define CONFIG_PCI_INDIRECT_BRIDGE
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
-#define CONFIG_PCIE2                   /* PCIE controler 2 */
-#define CONFIG_PCIE3                   /* PCIE controler 3 */
-#define CONFIG_PCIE4                   /* PCIE controler 4 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
+#define CONFIG_PCIE2                   /* PCIE controller 2 */
+#define CONFIG_PCIE3                   /* PCIE controller 3 */
+#define CONFIG_PCIE4                   /* PCIE controller 4 */
 
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 85df388b6f958fe1f5be4b8aaa6897b1af218c32..d8c57a833b86916408db6845e4e00c08e0d8a3ce 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -550,10 +550,10 @@ unsigned long get_board_ddr_clk(void);
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
 #define CONFIG_PCI             /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           /* PCIE controler 1 */
-#define CONFIG_PCIE2           /* PCIE controler 2 */
-#define CONFIG_PCIE3           /* PCIE controler 3 */
-#define CONFIG_PCIE4           /* PCIE controler 4 */
+#define CONFIG_PCIE1           /* PCIE controller 1 */
+#define CONFIG_PCIE2           /* PCIE controller 2 */
+#define CONFIG_PCIE3           /* PCIE controller 3 */
+#define CONFIG_PCIE4           /* PCIE controller 4 */
 #define CONFIG_FSL_PCIE_RESET
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 5e2d65975df2792d8fb5801a27f95094df99bc3a..b6be46e004f46ec7d7717e206922c1fe50b28d73 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -500,10 +500,10 @@ unsigned long get_board_ddr_clk(void);
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
 #define CONFIG_PCI             /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           /* PCIE controler 1 */
-#define CONFIG_PCIE2           /* PCIE controler 2 */
-#define CONFIG_PCIE3           /* PCIE controler 3 */
-#define CONFIG_PCIE4           /* PCIE controler 4 */
+#define CONFIG_PCIE1           /* PCIE controller 1 */
+#define CONFIG_PCIE2           /* PCIE controller 2 */
+#define CONFIG_PCIE3           /* PCIE controller 3 */
+#define CONFIG_PCIE4           /* PCIE controller 4 */
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT   /* enable 64-bit PCI resources */
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */

diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index a0cce858a14ea799cd8204c57a3cc8dd8af02014..ab838a8036c6623d9071c52a95c34e9fa0fa9c82 100644 (file)
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -92,9 +92,9 @@
 #define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
-#define CONFIG_PCIE2                   /* PCIE controler 2 */
-#define CONFIG_PCIE3                   /* PCIE controler 3 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
+#define CONFIG_PCIE2                   /* PCIE controller 2 */
+#define CONFIG_PCIE3                   /* PCIE controller 3 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 

diff --git a/include/configs/controlcenterd.h b/include/configs/controlcenterd.h
index 1bb8d93ba0658f716e6fc7ec848dcd5c40ab69b6..c60c64439365c90e72629aea176e0694bc8af326 100644 (file)
--- a/include/configs/controlcenterd.h
+++ b/include/configs/controlcenterd.h
@@ -245,7 +245,7 @@
  * Memory space is mapped 1-1, but I/O space must start from 0.
  */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCIE1                   /* PCIE controller 1 (slot 1) */
 #define CONFIG_PCI_INDIRECT_BRIDGE
 #define CONFIG_PCI_PNP                 /* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW           /* show pci devices on startup */

diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 96f17d3e7c385b279a0710c4ab26babca040de4a..a06bfe05adbf35c0892f502ab57d1884e4719a1e 100644 (file)
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -67,8 +67,8 @@
 #define CONFIG_FSL_ELBC                        /* Has Enhanced localbus controller */
 #define CONFIG_FSL_CAAM                        /* Enable SEC/CAAM */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
-#define CONFIG_PCIE2                   /* PCIE controler 2 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
+#define CONFIG_PCIE2                   /* PCIE controller 2 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 

diff --git a/include/configs/cyrus.h b/include/configs/cyrus.h
index 4280c9cfb40ef1131364761dcbf8fd8a0d70514a..660646eb91887ce4f117179b6f438b6db235e187 100644 (file)
--- a/include/configs/cyrus.h
+++ b/include/configs/cyrus.h
@@ -59,8 +59,8 @@
 #define CONFIG_SYS_NUM_CPC             CONFIG_NUM_DDR_CONTROLLERS
 #define CONFIG_FSL_ELBC                        /* Has Enhanced localbus controller */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
-#define CONFIG_PCIE2                   /* PCIE controler 2 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
+#define CONFIG_PCIE2                   /* PCIE controller 2 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 

diff --git a/include/configs/km/kmp204x-common.h b/include/configs/km/kmp204x-common.h
index 9232ee32a7c332df54b30fe20cd7a574b26d29a0..028623d1ee80ef7896ca45efa342d48404341bb2 100644 (file)
--- a/include/configs/km/kmp204x-common.h
+++ b/include/configs/km/kmp204x-common.h
@@ -45,8 +45,8 @@
 #define CONFIG_SYS_NUM_CPC             CONFIG_NUM_DDR_CONTROLLERS
 #define CONFIG_FSL_ELBC                        /* Has Enhanced localbus controller */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
-#define CONFIG_PCIE3                   /* PCIE controler 3 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
+#define CONFIG_PCIE3                   /* PCIE controller 3 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 

diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 3796395bd6771f57cb58533368a719e8bc76fea5..f605ca62803e1c4e7978ed7331c69713a8a0d539 100644 (file)
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -528,8 +528,8 @@ unsigned long get_board_ddr_clk(void);
 
 /* PCIe */
 #define CONFIG_PCI             /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           /* PCIE controler 1 */
-#define CONFIG_PCIE2           /* PCIE controler 2 */
+#define CONFIG_PCIE1           /* PCIE controller 1 */
+#define CONFIG_PCIE2           /* PCIE controller 2 */
 #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
 #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
 

diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 3e3212848591ed15af2d3806ef47c4fc1c2b07e4..32d2acc0cda91c899d0fd2cd22702614a88eeb5b 100644 (file)
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -377,8 +377,8 @@
 
 /* PCIe */
 #define CONFIG_PCI             /* Enable PCI/PCIE */
-#define CONFIG_PCIE1           /* PCIE controler 1 */
-#define CONFIG_PCIE2           /* PCIE controler 2 */
+#define CONFIG_PCIE1           /* PCIE controller 1 */
+#define CONFIG_PCIE2           /* PCIE controller 2 */
 #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
 #define FSL_PCIE_COMPAT "fsl,ls1021a-pcie"
 

diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 8e0b472fd753609750d27665ef0107af291f1a29..a3aad1b99d9204d696a466b99094bb53e63a10e5 100644 (file)
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -185,10 +185,10 @@ unsigned long long get_qixis_addr(void);
 #endif
 
 /* PCIe */
-#define CONFIG_PCIE1           /* PCIE controler 1 */
-#define CONFIG_PCIE2           /* PCIE controler 2 */
-#define CONFIG_PCIE3           /* PCIE controler 3 */
-#define CONFIG_PCIE4           /* PCIE controler 4 */
+#define CONFIG_PCIE1           /* PCIE controller 1 */
+#define CONFIG_PCIE2           /* PCIE controller 2 */
+#define CONFIG_PCIE3           /* PCIE controller 3 */
+#define CONFIG_PCIE4           /* PCIE controller 4 */
 #define CONFIG_PCIE_LAYERSCAPE /* Use common FSL Layerscape PCIe code */
 #ifdef CONFIG_LS2080A
 #define FSL_PCIE_COMPAT "fsl,ls2080a-pcie"

diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 596193d5c4cf41bcc803f4e1c7a02bbd315075b5..71b2fa9c074fe631282c8f0280edfda50345270c 100644 (file)
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -306,8 +306,8 @@
 
 #define CONFIG_FSL_ELBC
 #define CONFIG_PCI
-#define CONFIG_PCIE1   /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2   /* PCIE controler 2 (slot 2) */
+#define CONFIG_PCIE1   /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2   /* PCIE controller 2 (slot 2) */
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  /* need PCIe reset errata */

diff --git a/include/configs/p1_twr.h b/include/configs/p1_twr.h
index f2959c9b239240efbd864018078b8058d14ad8ae..9b75afe92a54431562f5de2d31e6d07e2581ab32 100644 (file)
--- a/include/configs/p1_twr.h
+++ b/include/configs/p1_twr.h
@@ -48,8 +48,8 @@
 
 #define CONFIG_FSL_ELBC
 #define CONFIG_PCI
-#define CONFIG_PCIE1   /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2   /* PCIE controler 2 (slot 2) */
+#define CONFIG_PCIE1   /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2   /* PCIE controller 2 (slot 2) */
 #define CONFIG_FSL_PCI_INIT    /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE     /* indirect PCI bridge support */
 #define CONFIG_FSL_PCIE_RESET  /* need PCIe reset errata */

diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
index f34cef519c6d3619cad2b27663ca3c5aaaa11744..a7c7aef71ab9414cb9c43fdd38a47cd520a0430b 100644 (file)
--- a/include/configs/sbc8641d.h
+++ b/include/configs/sbc8641d.h
@@ -44,8 +44,8 @@
 #define CONFIG_SRIO1                   /* SRIO port 1 */
 
 #define CONFIG_PCI             1       /* Enable PCIE */
-#define CONFIG_PCIE1           1       /* PCIE controler 1 (slot 1) */
-#define CONFIG_PCIE2           1       /* PCIE controler 2 (slot 2) */
+#define CONFIG_PCIE1           1       /* PCIE controller 1 (slot 1) */
+#define CONFIG_PCIE2           1       /* PCIE controller 2 (slot 2) */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_FSL_LAW         1       /* Use common FSL init code */

diff --git a/include/configs/t4qds.h b/include/configs/t4qds.h
index af61f2169394b95d164c8dfd207473ba66777a84..8ce337e0a764ee7cbe44b7a453963e28e2d86e8c 100644 (file)
--- a/include/configs/t4qds.h
+++ b/include/configs/t4qds.h
@@ -32,9 +32,9 @@
 #define CONFIG_SYS_NUM_CPC             CONFIG_NUM_DDR_CONTROLLERS
 #define CONFIG_FSL_IFC                 /* Enable IFC Support */
 #define CONFIG_PCI                     /* Enable PCI/PCIE */
-#define CONFIG_PCIE1                   /* PCIE controler 1 */
-#define CONFIG_PCIE2                   /* PCIE controler 2 */
-#define CONFIG_PCIE3                   /* PCIE controler 3 */
+#define CONFIG_PCIE1                   /* PCIE controller 1 */
+#define CONFIG_PCIE2                   /* PCIE controller 2 */
+#define CONFIG_PCIE3                   /* PCIE controller 3 */
 #define CONFIG_FSL_PCI_INIT            /* Use common FSL init code */
 #define CONFIG_SYS_PCI_64BIT           /* enable 64-bit PCI resources */
 

diff --git a/include/configs/xpedite517x.h b/include/configs/xpedite517x.h
index af02efbdef7354988a68885909cfbc5ec4b83f4b..86c9b4c41f62396d6d92e6bdfb7727da9dd5dbae 100644 (file)
--- a/include/configs/xpedite517x.h
+++ b/include/configs/xpedite517x.h
@@ -30,8 +30,8 @@
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
 #define CONFIG_PCI_PNP         1       /* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW   1       /* show pci devices on startup */
-#define CONFIG_PCIE1           1       /* PCIE controler 1 */
-#define CONFIG_PCIE2           1       /* PCIE controler 2 */
+#define CONFIG_PCIE1           1       /* PCIE controller 1 */
+#define CONFIG_PCIE2           1       /* PCIE controller 2 */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */

diff --git a/include/configs/xpedite537x.h b/include/configs/xpedite537x.h
index a1c5826f7badb1665f6fa902b0742b6356e0d3ab..6a06b0ab1c984f1f0a845771fde034c8154d053f 100644 (file)
--- a/include/configs/xpedite537x.h
+++ b/include/configs/xpedite537x.h
@@ -30,8 +30,8 @@
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
 #define CONFIG_PCI_PNP         1       /* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW   1       /* show pci devices on startup */
-#define CONFIG_PCIE1           1       /* PCIE controler 1 */
-#define CONFIG_PCIE2           1       /* PCIE controler 2 */
+#define CONFIG_PCIE1           1       /* PCIE controller 1 */
+#define CONFIG_PCIE2           1       /* PCIE controller 2 */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */

diff --git a/include/configs/xpedite550x.h b/include/configs/xpedite550x.h
index 02685ca1a8252f3a0e4c364080021dad285e518d..5b377e35eed0096180dfcd754eab42a88e8c87ea 100644 (file)
--- a/include/configs/xpedite550x.h
+++ b/include/configs/xpedite550x.h
@@ -31,7 +31,7 @@
 #define CONFIG_PCI             1       /* Enable PCI/PCIE */
 #define CONFIG_PCI_PNP         1       /* do pci plug-and-play */
 #define CONFIG_PCI_SCAN_SHOW   1       /* show pci devices on startup */
-#define CONFIG_PCIE1           1       /* PCIE controler 1 (PEX8112 or XMC) */
+#define CONFIG_PCIE1           1       /* PCIE controller 1 (PEX8112 or XMC) */
 #define CONFIG_FSL_PCI_INIT    1       /* Use common FSL init code */
 #define CONFIG_PCI_INDIRECT_BRIDGE 1   /* indirect PCI bridge support */
 #define CONFIG_SYS_PCI_64BIT   1       /* enable 64-bit PCI resources */