]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
at91: move cpu name define to arm/arch/ cpu header
authorJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Sun, 31 May 2009 10:44:46 +0000 (12:44 +0200)
committerWolfgang Denk <wd@denx.de>
Fri, 12 Jun 2009 18:39:53 +0000 (20:39 +0200)
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
include/asm-arm/arch-at91/at91cap9.h
include/asm-arm/arch-at91/at91sam9260.h
include/asm-arm/arch-at91/at91sam9261.h
include/asm-arm/arch-at91/at91sam9263.h
include/asm-arm/arch-at91/at91sam9rl.h
include/configs/at91cap9adk.h
include/configs/at91sam9260ek.h
include/configs/at91sam9261ek.h
include/configs/at91sam9263ek.h
include/configs/at91sam9rlek.h
include/configs/pm9263.h

index 0b5222813867cb795402fed1078aaa52ef6488da..b128ac5a393e02128e6af0c7b40389743d9c4ab9 100644 (file)
 
 #define CONFIG_DRAM_BASE       AT91_CHIPSELECT_6
 
+/*
+ * Cpu Name
+ */
+#define AT91_CPU_NAME  "AT91CAP9"
+
 #endif
index 920a7f3c9ffeb59b3edcb080b9f41e581ba5fa78..73975f484eccdf9b13950a3ef521ae43511b76a2 100644 (file)
 #define AT91SAM9XE_FLASH_BASE  0x00200000      /* Internal FLASH base address */
 #define AT91SAM9XE_SRAM_BASE   0x00300000      /* Internal SRAM base address */
 
+/*
+ * Cpu Name
+ */
+#if defined(CONFIG_AT91SAM9260)
+#define AT91_CPU_NAME  "AT91SAM9260"
+#elif defined(CONFIG_AT91SAM9G20)
+#define AT91_CPU_NAME  "AT91SAM9G20"
+#endif
+
 #endif
index 752d81dfe3f030259002abba1af2e2bc448db6a5..b303e07bbc48202a8c7b1ce5b8355c069779e5bb 100644 (file)
 #define AT91SAM9261_UHP_BASE   0x00500000      /* USB Host controller */
 #define AT91SAM9261_LCDC_BASE  0x00600000      /* LDC controller */
 
+/*
+ * Cpu Name
+ */
+#define AT91_CPU_NAME  "AT91SAM9261"
 
 #endif
index 07b265f23a177e90efae958b4c10f1b693613c43..966a6836fe908cf08b418fc2ac3c11a92564309a 100644 (file)
 #define AT91SAM9263_DMAC_BASE  0x00800000      /* DMA Controller */
 #define AT91SAM9263_UHP_BASE   0x00a00000      /* USB Host controller */
 
+/*
+ * Cpu Name
+ */
+#define AT91_CPU_NAME  "AT91SAM9263"
 
 #endif
index 215bbc8d6a7cf91a886113bf340e27da94070186..4dd8037c6e6b030c3125f876897de65ab5385b1c 100644 (file)
 #define AT91SAM9RL_LCDC_BASE   0x00500000      /* LCD Controller */
 #define AT91SAM9RL_UDPHS_BASE  0x00600000      /* USB Device HS controller */
 
+/*
+ * Cpu Name
+ */
+#define AT91_CPU_NAME  "AT91SAM9RL"
+
 #endif
index b2e6d7d02c9fa78ea45ebf08913dfd465b6c2cac..526cd60ae0961fbe87570e6ec4ba98f1f24d8185 100644 (file)
@@ -28,7 +28,6 @@
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_CPU_NAME          "AT91CAP9"
 #define AT91_MAIN_CLOCK                12000000        /* 12 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
index e46c9d6ae6509b320616a51b0686d17d1cfc88f8..1828c63afd9dd43becf1fa724d2affca016c2033 100644 (file)
 #define CONFIG_ARM926EJS       1       /* This is an ARM926EJS Core    */
 
 #ifdef CONFIG_AT91SAM9G20EK
-#define AT91_CPU_NAME          "AT91SAM9G20"
 #define CONFIG_AT91SAM9G20     1       /* It's an Atmel AT91SAM9G20 SoC*/
 #else
-#define AT91_CPU_NAME          "AT91SAM9260"
 #define CONFIG_AT91SAM9260     1       /* It's an Atmel AT91SAM9260 SoC*/
 #endif
 
index 9621b7cb324e01a61c17c488b70dd5dc4532f180..4f6b64011dc4c0739f7861379164a85d4e1a159f 100644 (file)
@@ -28,7 +28,6 @@
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_CPU_NAME          "AT91SAM9261"
 #define AT91_MAIN_CLOCK                18432000        /* 18.432 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
index d03ecee3f61c265f6468103473d70bc627abbf4e..c212d11d0d21905d6686674afe12acdaa7e6becf 100644 (file)
@@ -28,7 +28,6 @@
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_CPU_NAME          "AT91SAM9263"
 #define AT91_MAIN_CLOCK                16367660        /* 16.367 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
index 846d1658e07f76af460c6be3cbc2e5c897217aae..c4668236c2b80ad6a6f861ffdbcc69860eac51a9 100644 (file)
@@ -28,7 +28,6 @@
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_CPU_NAME          "AT91SAM9RL"
 #define AT91_MAIN_CLOCK                12000000        /* 12 MHz crystal */
 #define CONFIG_SYS_HZ          1000
 
index 0db17b3545a316222f32aed6fff7ecb78c27008e..d60c417a11315c166953fcbefc662b68206cc229 100644 (file)
@@ -29,8 +29,6 @@
 #define __CONFIG_H
 
 /* ARM asynchronous clock */
-#define AT91_CPU_NAME          "AT91SAM9263"
-
 #define CONFIG_DISPLAY_BOARDINFO
 
 #define MASTER_PLL_DIV         15