]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
ARM: dts: sama7g5ek: fix TXC pin configuration
authorNicolas Ferre <nicolas.ferre@microchip.com>
Fri, 30 Oct 2020 17:33:14 +0000 (18:33 +0100)
committerEugen Hristev <eugen.hristev@microchip.com>
Thu, 7 Jan 2021 07:44:16 +0000 (09:44 +0200)
TXC line is directly connected from the SoC to the KSZ9131 PHY. There
is a transient state on this signal, before configuring it to RGMII,
which leads to packet transmit being blocked.
Keeping a pull-up when muxing this pin as function A (G0_TXCK) fixes
the issue.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
arch/arm/dts/sama7g5ek.dts

index b7c35559fe8303064c5b1c613c3abc3639522b40..ff9c9eb45c62ae48c519d9f62439700f4d88a2e7 100644 (file)
@@ -90,7 +90,7 @@
        #address-cells = <1>;
        #size-cells = <0>;
        pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_gmac0_default>;
+       pinctrl-0 = <&pinctrl_gmac0_default &pinctrl_gmac0_txc_default>;
        phy-mode = "rgmii-id";
        status = "okay";
 
                         <PIN_PA28__G0_RX2>,
                         <PIN_PA29__G0_RX3>,
                         <PIN_PA15__G0_TXEN>,
-                        <PIN_PA24__G0_TXCK>,
                         <PIN_PA30__G0_RXCK>,
                         <PIN_PA18__G0_RXDV>,
                         <PIN_PA22__G0_MDC>,
                bias-disable;
        };
 
+       pinctrl_gmac0_txc_default: gmac0_txc_default {
+               pinmux = <PIN_PA24__G0_TXCK>;
+               bias-pull-up;
+       };
+
        pinctrl_gmac1_default: gmac1_default {
                pinmux = <PIN_PD30__G1_TXCK>,
                         <PIN_PD22__G1_TX0>,