]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
configs: drop CONFIG_MMCROOT
authorPeng Fan <peng.fan@nxp.com>
Fri, 15 Apr 2022 04:23:41 +0000 (12:23 +0800)
committerStefano Babic <sbabic@denx.de>
Thu, 21 Apr 2022 13:18:17 +0000 (15:18 +0200)
CONFIG_MMCROOT is only used to set mmcroot, no need a dedicated macro.

Script as below
"
 for i in `ls include/configs/*.h`
 do
 mmcroot=`sed -n '/define.*MMCROOT/ p' $i  | awk -F\" '{ print $2;}'`

 if [ ! -n "$mmcroot" ]; then
  continue
 fi

 sed -i '/define.*MMCROOT/ d' $i
 sed -i 's,\" CONFIG_MMCROOT \",'$mmcroot',g' $i

 done
"

Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
27 files changed:
include/configs/aristainetos2.h
include/configs/capricorn-common.h
include/configs/cgtqmx8.h
include/configs/cl-som-imx7.h
include/configs/imx7-cm.h
include/configs/imx8mm-cl-iot-gate.h
include/configs/imx8mm_evk.h
include/configs/imx8mn_evk.h
include/configs/imx8mp_evk.h
include/configs/imx8mp_rsb3720.h
include/configs/imx8mq_cm.h
include/configs/imx8mq_evk.h
include/configs/imx8mq_phanbell.h
include/configs/imx8qm_mek.h
include/configs/imx8qm_rom7720.h
include/configs/imx8qxp_mek.h
include/configs/imx8ulp_evk.h
include/configs/liteboard.h
include/configs/mx6sllevk.h
include/configs/mx6ul_14x14_evk.h
include/configs/mx6ullevk.h
include/configs/mx7ulp_com.h
include/configs/mx7ulp_evk.h
include/configs/phycore_imx8mm.h
include/configs/phycore_imx8mp.h
include/configs/pico-imx8mq.h
include/configs/xpress.h

index 611b6d724e13ee801426c90b3a296fb4977ef812..0dcd4cae2fa166a87830ec37cd7011e4d64c9747 100644 (file)
@@ -26,7 +26,6 @@
 
 #include "mx6_common.h"
 
-#define CONFIG_MMCROOT         "/dev/mmcblk0p1"
 
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC1_BASE_ADDR
                "${pubkey}\0" \
        "mainRargs=setenv bootargs console=${console},${baudrate} " \
                "rescue_sysnum=${rescue_sysnum} root=${emmcroot} rootfstype=ext4\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        "mmcRargs=setenv bootargs console=${console},${baudrate} " \
index 58d7a3a8ce24c71957fb0c1f3d04fef4bf15779d..08534cd1a30fab00cb4a617fb6f20f9cc66244cb 100644 (file)
 #define CONFIG_SYS_INIT_SP_ADDR                0x80200000
 
 /* On CCP board, USDHC1 is for eMMC */
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"  /* eMMC */
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define PHYS_SDRAM_1                   0x80000000
index bd5c072382a8a3695b38294f6349bf958ea33740..4b4694ec071ce06ec90d1b0ac643efdb3d9e051b 100644 (file)
@@ -78,7 +78,7 @@
        "fdt_file=imx8qm-cgt-qmx8.dtb\0" \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 
 #define CONFIG_SYS_INIT_SP_ADDR                0x80200000
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 #define CONFIG_SYS_FSL_USDHC_NUM       3
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
index 8af80f58f8ec6478164a3fadcdb251b634f4566a..4b494d8aeef7967c7819ef1138ead477c4a2ee8b 100644 (file)
 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
 
 #define CONFIG_SYS_FSL_USDHC_NUM       2
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2" /* USDHC1 */
 #endif
 
 /* USB Configs */
index 46ca1c581452b2892a5d9464f15ef889bd090530..2d9f8bb510b87c410d1ce82631c01a26e829bbb9 100644 (file)
@@ -31,7 +31,7 @@
        "fdt_addr=0x83000000\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
                "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
@@ -83,7 +83,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
 #define CONFIG_SYS_FSL_USDHC_NUM               2
 
-#define CONFIG_MMCROOT                                 "/dev/mmcblk0p2"  /* USDHC1 */
 
 /* USB Configs */
 #define CONFIG_MXC_USB_PORTSC  (PORT_PTS_UTMI | PORT_PTS_PTW)
index b2cde0307326f086db6aa98c7381613df4671ff2..c20c32b6951f5e68a58b90982cafff8f0a03eb88 100644 (file)
@@ -88,7 +88,7 @@
        "bootm_size=0x10000000\0" \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define PHYS_SDRAM                     0x40000000
index f4b6353ea850a54544262fdd52790b9b1d83fd8d..42b78485cfcfdf80a9d7305be90dd2ad428a7291 100644 (file)
@@ -52,7 +52,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -63,7 +63,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index f969314d6b24183d63d177987120afb58c62cce2..86b75ab4625b50043ad8d13b2fca354db389f1d9 100644 (file)
@@ -51,7 +51,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -62,7 +62,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index 35fc27bb3707f5a5aaf1ac694b145eb99fa4dc2f..cc8d65cb54ed8234fb93b35fb4e1c2f7854cefdd 100644 (file)
@@ -61,7 +61,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -72,7 +72,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 /* Totally 6GB DDR */
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
index 2553f0dfb5c1a03971284ddb85b092e8320a0d25..c5dd545471e17830e1599affc25cf0e6f81c8301 100644 (file)
        "bootm_size=0x10000000\0" \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs ${jh_clk} console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 /* Totally 6GB or 4G DDR */
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
index a3bb3c9d291713cfc3ff15304f30a9efcb4db7d4..989486aa6dcb7d3f5582ffa2f916f63c9d18db97 100644 (file)
@@ -55,7 +55,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -66,7 +66,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index 94886fa268cfd16f885f8122287aa3774fcd1b08..f7929e5867e938d12d934ecadde9a644e8ffbb84 100644 (file)
@@ -62,7 +62,7 @@
        "initrd_addr=0x43800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -73,7 +73,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index ef5992d7c3979a7a995e845c940edfc6e37e26ab..f6410114b765b656381462ca26765d626aa23cb9 100644 (file)
@@ -52,7 +52,7 @@
        "initrd_high=0xffffffffffffffff\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE           0x40000000
 #define PHYS_SDRAM                      0x40000000
index 8a2692257786f22919f90a433c999338834f6410..9452ba5615283866843e481d11231d9a2f4cc530 100644 (file)
@@ -50,7 +50,7 @@
        "initrd_high=0xffffffffffffffff\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 /* Default environment is in SD */
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define PHYS_SDRAM_1                   0x80000000
index 7532c6e7551d2d6fa13f34e2027bdc3ea8d23318..04a2216fcd80fb046f6c344718abf84b9de251d9 100644 (file)
@@ -66,7 +66,7 @@
        "initrd_addr=0x83800000\0"              \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
  * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
  * USDHC2 is for SD, USDHC3 is for SD on base board
  */
-#define CONFIG_MMCROOT                 "/dev/mmcblk2p2"  /* USDHC3 */
 #define CONFIG_SYS_FSL_USDHC_NUM       3
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
index 01577932884b59cabbac5758caa88cbe1e525edd..c290c19c3475a2cd5614b2b5b1d8d5a1a551f118 100644 (file)
@@ -48,7 +48,7 @@
        "initrd_high=0xffffffffffffffff\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot}\0 " \
        "loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
 /* Default environment is in SD */
 
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define PHYS_SDRAM_1                   0x80000000
index f078c37c2deb7bf4e869791cdb99a90fed78d048..46cba330b23de6b5066e1ec82a29e20b88a83eaf 100644 (file)
@@ -58,7 +58,7 @@
        "initrd_addr=0x83800000\0"              \
        "bootm_size=0x10000000\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk2p2 rootwait rw\0" \
 
 /* Link Definitions */
 
@@ -67,7 +67,6 @@
 #define CONFIG_SYS_INIT_SP_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_INIT_SP_ADDR                (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk2p2"
 
 #define CONFIG_SYS_SDRAM_BASE          0x80000000
 #define PHYS_SDRAM                     0x80000000
index d0960bcaf9ae2e62776cc89126c0b111ffe63d87..e8fd4e7a8e8572c3fa791f80ce33294302a5d8a5 100644 (file)
@@ -35,7 +35,7 @@
        "ip_dyn=yes\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* FLASH and environment organization */
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"
 
 /* USB Configs */
 #ifdef CONFIG_CMD_USB
index 0793028ba1fc233dfe154fae8f0e10c5cf8e2373..1b32f58afca363862cca779399aea9d5928da1c5 100644 (file)
@@ -25,7 +25,7 @@
        "ip_dyn=yes\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
@@ -92,7 +92,6 @@
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* Environment organization */
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"  /* USDHC1 */
 
 /* MMC Configs */
 #define CONFIG_SYS_FSL_ESDHC_ADDR      USDHC1_BASE_ADDR
index 17e7ae0b4ccabbe7c8e1f78f5315759c45632475..72554d18b0a5ecd25ca997d1eabe5dbb3a126b3a 100644 (file)
@@ -47,7 +47,7 @@
        "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* environment organization */
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 /* USB Configs */
 #ifdef CONFIG_CMD_USB
index dfcdc00c061d81b661b3d88af8c39b20cd4ef404..bc494b46b693b044e5f87d10d0d3a7dd000425d4 100644 (file)
@@ -43,7 +43,7 @@
        "videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* environment organization */
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"  /* USDHC2 */
 
 #define CONFIG_IOMUX_LPSR
 
index ce6afcde2a012edf8fc8fb5dbe4fae9cc471722c..f8a5009637dc30b44490af537c7bd2a5863da1ce 100644 (file)
@@ -17,8 +17,6 @@
 
 #define CONFIG_SYS_BOOTM_LEN           0x1000000
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"
-
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR                 WDG1_RBASE
 
@@ -41,7 +39,7 @@
        "fdt_addr=0x63000000\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
        "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
index e80d748d991ba06fc47c8dbbfc3cc80dc2e891d1..7644274d84b6bda71fa03205fdd4eb623e97eb81 100644 (file)
@@ -13,7 +13,6 @@
 
 #define CONFIG_SYS_BOOTM_LEN           0x1000000
 
-#define CONFIG_MMCROOT                  "/dev/mmcblk0p2"  /* USDHC1 */
 
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR                 WDG1_RBASE
@@ -47,7 +46,7 @@
        "ip_dyn=yes\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \
index 528cda0dbe38fe73d0983fe825546c5e985760e8..71f0c42ec0ccace07c9972224953e505ac22aacd 100644 (file)
@@ -77,7 +77,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk2p2"  /* USDHC3 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 
index db530965a2a66dd4476e18a7fe75892c401594da..0c963b62b3b5f86146368abd362af5dff36785f1 100644 (file)
@@ -77,7 +77,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk2p2"  /* USDHC3 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 
index 495fddf248db8e8ba6ea6bdc6fe7046ea8f30fbf..95845276e7b42af328d507784ebaf482ef7e4a14 100644 (file)
@@ -46,7 +46,7 @@
        "initrd_high=0xffffffffffffffff\0"                              \
        "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0"              \
        "mmcpart=1\0"   \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0"                      \
+       "mmcroot=/dev/mmcblk1p2 rootwait rw\0"                  \
        "mmcautodetect=yes\0"                                           \
        "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
        "loadbootscript="                                               \
@@ -80,7 +80,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR                \
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-#define CONFIG_MMCROOT                 "/dev/mmcblk1p2"        /* USDHC2 */
 
 #define CONFIG_SYS_SDRAM_BASE          0x40000000
 #define PHYS_SDRAM                     0x40000000
index 13cfa2cd4bdfb4818ab2d0d5f573e6730bbdfeb5..43b67a355b12b4d1a1676f6fb2f5cf0d84f35cdc 100644 (file)
@@ -34,7 +34,6 @@
        (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
 /* Environment is in stored in the eMMC boot partition */
-#define CONFIG_MMCROOT                 "/dev/mmcblk0p2"  /* USDHC2 */
 
 /* USB Configs */
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
@@ -61,7 +60,7 @@
        "ip_dyn=yes\0" \
        "mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
        "mmcpart=1\0" \
-       "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
+       "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
        "mmcautodetect=yes\0" \
        "mmcargs=setenv bootargs console=${console},${baudrate} " \
                "root=${mmcroot}\0" \