]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm: dts: fsl-ls1088a: syncronise MDIO+PCS U-Boot definitions with Linux
authorMathew McBride <matt@traverse.com.au>
Wed, 12 Apr 2023 07:38:25 +0000 (07:38 +0000)
committerPeng Fan <peng.fan@nxp.com>
Fri, 5 May 2023 01:46:04 +0000 (09:46 +0800)
Synchronise the MDIO controller definitions with Linux, so
the controllers will be usable when passing U-Boot's
control FDT to Linux.

This also adds the PCS (internal controller) definitions
which are not used by U-Boot.

Caveat: The kernel definition uses "fsl,fman-memac-mdio",
as with other members of the Layerscape family, but
U-Boot uses a different driver for the DPAA2
Family devices (LS1088/LS2088/LX2160). So
we use "fsl,ls-mdio" as the first compatible string
for these devices.

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
arch/arm/dts/fsl-ls1088a-u-boot.dtsi
arch/arm/dts/fsl-ls1088a.dtsi

index 3a2291527c3a706746205e9688ee903a27808f33..d9d1347b0cae385d6b1eaf2ca9a7975c9a61f03c 100644 (file)
        bootph-all;
 };
 
+/* MDIO controllers - U-Boot uses a different
+ * driver for the DPAA2 (LS/LX2) family,
+ * so must match fsl,ls-mdio first.
+ */
+&emdio1 {
+       compatible = "fsl,ls-mdio", "fsl,fman-memac-mdio";
+};
+
+&emdio2 {
+       compatible = "fsl,ls-mdio", "fsl,fman-memac-mdio";
+};
+
 &pcie1 {
        status = "okay";
 };
index ca88b9e9f427d28a859be69c21a35c75a7d006bd..ee40a556546e61a063de238370f288ff28ec406a 100644 (file)
                                     <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>,
                                     <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
                };
+
+               emdio1: mdio@8b96000 {
+                       compatible = "fsl,fman-memac-mdio";
+                       reg = <0x0 0x8b96000 0x0 0x1000>;
+                       little-endian;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       clock-frequency = <2500000>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
+                       status = "disabled";
+               };
+
+               emdio2: mdio@8b97000 {
+                       compatible = "fsl,fman-memac-mdio";
+                       reg = <0x0 0x8b97000 0x0 0x1000>;
+                       little-endian;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       clock-frequency = <2500000>;
+                       clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+                                           QORIQ_CLK_PLL_DIV(1)>;
+                       status = "disabled";
+               };
+
+               pcs_mdio1: mdio@8c07000 {
+                       compatible = "fsl,fman-memac-mdio";
+                       reg = <0x0 0x8c07000 0x0 0x1000>;
+                       little-endian;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       pcs1: ethernet-phy@0 {
+                               reg = <0>;
+                       };
+               };
+
+               pcs_mdio2: mdio@8c0b000 {
+                       compatible = "fsl,fman-memac-mdio";
+                       reg = <0x0 0x8c0b000 0x0 0x1000>;
+                       little-endian;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       pcs2: ethernet-phy@0 {
+                               reg = <0>;
+                       };
+               };
+
+               pcs_mdio3: mdio@8c0f000 {
+                       compatible = "fsl,fman-memac-mdio";
+                       reg = <0x0 0x8c0f000 0x0 0x1000>;
+                       little-endian;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       pcs3_0: ethernet-phy@0 {
+                               reg = <0>;
+                       };
+
+                       pcs3_1: ethernet-phy@1 {
+                               reg = <1>;
+                       };
+
+                       pcs3_2: ethernet-phy@2 {
+                               reg = <2>;
+                       };
+
+                       pcs3_3: ethernet-phy@3 {
+                               reg = <3>;
+                       };
+               };
+
+               pcs_mdio7: mdio@8c1f000 {
+                       compatible = "fsl,fman-memac-mdio";
+                       reg = <0x0 0x8c1f000 0x0 0x1000>;
+                       little-endian;
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+
+                       pcs7_0: ethernet-phy@0 {
+                               reg = <0>;
+                       };
+
+                       pcs7_1: ethernet-phy@1 {
+                               reg = <1>;
+                       };
+
+                       pcs7_2: ethernet-phy@2 {
+                               reg = <2>;
+                       };
+
+                       pcs7_3: ethernet-phy@3 {
+                               reg = <3>;
+                       };
+               };
        };
 
        dspi: dspi@2100000 {
                        };
                };
        };
-
-       emdio1: mdio@8B96000 {
-               compatible = "fsl,ls-mdio";
-               reg = <0x0 0x8B96000 0x0 0x1000>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-               status = "disabled";
-       };
-
-       emdio2: mdio@8B97000 {
-               compatible = "fsl,ls-mdio";
-               reg = <0x0 0x8B97000 0x0 0x1000>;
-               #address-cells = <1>;
-               #size-cells = <0>;
-               status = "disabled";
-       };
 };