Stop using immap_t for cpm offset on 85xx

In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_CPM_ADDR as the base of the CPM registers
instead of getting it via &immap->im_cpm.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/cpu/mpc85xx/commproc.c b/cpu/mpc85xx/commproc.c
index 3504d50caed847a93224080de67c9b40cecbaa2b..b0ecd25507bbb4ea6487610e1141796d5b3ce0f1 100644 (file)
--- a/cpu/mpc85xx/commproc.c
+++ b/cpu/mpc85xx/commproc.c
@@ -37,7 +37,7 @@ DECLARE_GLOBAL_DATA_PTR;
 void
 m8560_cpm_reset(void)
 {
-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
        volatile ulong count;
 
        gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
@@ -50,11 +50,11 @@ m8560_cpm_reset(void)
        /*
         * Reset CPM
         */
-       immr->im_cpm.im_cpm_cp.cpcr = CPM_CR_RST;
+       cpm->im_cpm_cp.cpcr = CPM_CR_RST;
        count = 0;
        do {                    /* Spin until command processed         */
                __asm__ __volatile__ ("eieio");
-       } while ((immr->im_cpm.im_cpm_cp.cpcr & CPM_CR_FLG) && ++count < 1000000);
+       } while ((cpm->im_cpm_cp.cpcr & CPM_CR_FLG) && ++count < 1000000);
 }
 
 /* Allocate some memory from the dual ported ram.
@@ -64,7 +64,7 @@ m8560_cpm_reset(void)
 uint
 m8560_cpm_dpalloc(uint size, uint align)
 {
-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
        uint    retloc;
        uint    align_mask, off;
        uint    savebase;
@@ -86,7 +86,7 @@ m8560_cpm_dpalloc(uint size, uint align)
        retloc = gd->dp_alloc_base;
        gd->dp_alloc_base += size;
 
-       memset((void *)&(immr->im_cpm.im_dprambase[retloc]), 0, size);
+       memset((void *)&(cpm->im_dprambase[retloc]), 0, size);
 
        return(retloc);
 }
@@ -120,16 +120,16 @@ m8560_cpm_hostalloc(uint size, uint align)
 void
 m8560_cpm_setbrg(uint brg, uint rate)
 {
-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
        volatile uint   *bp;
 
        /* This is good enough to get SMCs running.....
        */
        if (brg < 4) {
-               bp = (uint *)&(immr->im_cpm.im_cpm_brg1.brgc1);
+               bp = (uint *)&(cpm->im_cpm_brg1.brgc1);
        }
        else {
-               bp = (uint *)&(immr->im_cpm.im_cpm_brg2.brgc5);
+               bp = (uint *)&(cpm->im_cpm_brg2.brgc5);
                brg -= 4;
        }
        bp += brg;
@@ -142,16 +142,16 @@ m8560_cpm_setbrg(uint brg, uint rate)
 void
 m8560_cpm_fastbrg(uint brg, uint rate, int div16)
 {
-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
        volatile uint   *bp;
 
        /* This is good enough to get SMCs running.....
        */
        if (brg < 4) {
-               bp = (uint *)&(immr->im_cpm.im_cpm_brg1.brgc1);
+               bp = (uint *)&(cpm->im_cpm_brg1.brgc1);
        }
        else {
-               bp = (uint *)&(immr->im_cpm.im_cpm_brg2.brgc5);
+               bp = (uint *)&(cpm->im_cpm_brg2.brgc5);
                brg -= 4;
        }
        bp += brg;
@@ -167,14 +167,14 @@ m8560_cpm_fastbrg(uint brg, uint rate, int div16)
 void
 m8560_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel)
 {
-       volatile immap_t *immr = (immap_t *)CFG_IMMR;
+       volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
        volatile uint   *bp;
 
        if (brg < 4) {
-               bp = (uint *)&(immr->im_cpm.im_cpm_brg1.brgc1);
+               bp = (uint *)&(cpm->im_cpm_brg1.brgc1);
        }
        else {
-               bp = (uint *)&(immr->im_cpm.im_cpm_brg2.brgc5);
+               bp = (uint *)&(cpm->im_cpm_brg2.brgc5);
                brg -= 4;
        }
        bp += brg;

diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 79ad20c91aa2a2d63d3ad1e8a6b67bc49ae97363..5af69cea8de1e6f5810f27adde8ebf9b1f347622 100644 (file)
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -59,7 +59,7 @@ static void config_qe_ioports(void)
 #endif
 
 #ifdef CONFIG_CPM2
-static void config_8560_ioports (volatile immap_t * immr)
+void config_8560_ioports (volatile ccsr_cpm_t * cpm)
 {
        int portnum;
 
@@ -99,7 +99,7 @@ static void config_8560_ioports (volatile immap_t * immr)
                }
 
                if (pmsk != 0) {
-                       volatile ioport_t *iop = ioport_addr (immr, portnum);
+                       volatile ioport_t *iop = ioport_addr (cpm, portnum);
                        uint tpmsk = ~pmsk;
 
                        /*
@@ -143,7 +143,7 @@ void cpu_init_f (void)
 
 
 #ifdef CONFIG_CPM2
-       config_8560_ioports(immap);
+       config_8560_ioports((ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR);
 #endif
 
        /* Map banks 0 and 1 to the FLASH banks 0 and 1 at preliminary

diff --git a/cpu/mpc85xx/ether_fcc.c b/cpu/mpc85xx/ether_fcc.c
index 5b23a80e1ca9892d3ec94cde83e0985eb563b75d..bd62aab9f34b9567c43b65e986bc4d1339b09c4a 100644 (file)
--- a/cpu/mpc85xx/ether_fcc.c
+++ b/cpu/mpc85xx/ether_fcc.c
@@ -230,8 +230,8 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
 {
     struct ether_fcc_info_s * info = dev->priv;
     int i;
-    volatile immap_t *immr = (immap_t *)CFG_IMMR;
-    volatile ccsr_cpm_cp_t *cp = &(immr->im_cpm.im_cpm_cp);
+    volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
+    volatile ccsr_cpm_cp_t *cp = &(cpm->im_cpm_cp);
     fcc_enet_t *pram_ptr;
     unsigned long mem_addr;
 
@@ -242,35 +242,35 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
     /* 28.9 - (1-2): ioports have been set up already */
 
     /* 28.9 - (3): connect FCC's tx and rx clocks */
-    immr->im_cpm.im_cpm_mux.cmxuar = 0; /* ATM */
-    immr->im_cpm.im_cpm_mux.cmxfcr = (immr->im_cpm.im_cpm_mux.cmxfcr & ~info->cmxfcr_mask) |
+    cpm->im_cpm_mux.cmxuar = 0; /* ATM */
+    cpm->im_cpm_mux.cmxfcr = (cpm->im_cpm_mux.cmxfcr & ~info->cmxfcr_mask) |
                                                        info->cmxfcr_value;
 
     /* 28.9 - (4): GFMR: disable tx/rx, CCITT CRC, set Mode Ethernet */
     if(info->ether_index == 0) {
-       immr->im_cpm.im_cpm_fcc1.gfmr = FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
+       cpm->im_cpm_fcc1.gfmr = FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
     } else if (info->ether_index == 1) {
-       immr->im_cpm.im_cpm_fcc2.gfmr = FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
+       cpm->im_cpm_fcc2.gfmr = FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
     } else if (info->ether_index == 2) {
-       immr->im_cpm.im_cpm_fcc3.gfmr = FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
+       cpm->im_cpm_fcc3.gfmr = FCC_GFMR_MODE_ENET | FCC_GFMR_TCRC_32;
     }
 
     /* 28.9 - (5): FPSMR: enable full duplex, select CCITT CRC for Ethernet,MII */
     if(info->ether_index == 0) {
-       immr->im_cpm.im_cpm_fcc1.fpsmr = CFG_FCC_PSMR | FCC_PSMR_ENCRC;
+       cpm->im_cpm_fcc1.fpsmr = CFG_FCC_PSMR | FCC_PSMR_ENCRC;
     } else if (info->ether_index == 1){
-       immr->im_cpm.im_cpm_fcc2.fpsmr = CFG_FCC_PSMR | FCC_PSMR_ENCRC;
+       cpm->im_cpm_fcc2.fpsmr = CFG_FCC_PSMR | FCC_PSMR_ENCRC;
     } else if (info->ether_index == 2){
-       immr->im_cpm.im_cpm_fcc3.fpsmr = CFG_FCC_PSMR | FCC_PSMR_ENCRC;
+       cpm->im_cpm_fcc3.fpsmr = CFG_FCC_PSMR | FCC_PSMR_ENCRC;
     }
 
     /* 28.9 - (6): FDSR: Ethernet Syn */
     if(info->ether_index == 0) {
-       immr->im_cpm.im_cpm_fcc1.fdsr = 0xD555;
+       cpm->im_cpm_fcc1.fdsr = 0xD555;
     } else if (info->ether_index == 1) {
-       immr->im_cpm.im_cpm_fcc2.fdsr = 0xD555;
+       cpm->im_cpm_fcc2.fdsr = 0xD555;
     } else if (info->ether_index == 2) {
-       immr->im_cpm.im_cpm_fcc3.fdsr = 0xD555;
+       cpm->im_cpm_fcc3.fdsr = 0xD555;
     }
 
     /* reset indeces to current rx/tx bd (see eth_send()/eth_rx()) */
@@ -296,7 +296,7 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
     rtx.txbd[TX_BUF_CNT - 1].cbd_sc |= BD_ENET_TX_WRAP;
 
     /* 28.9 - (7): initialize parameter ram */
-    pram_ptr = (fcc_enet_t *)&(immr->im_cpm.im_dprambase[info->proff_enet]);
+    pram_ptr = (fcc_enet_t *)&(cpm->im_dprambase[info->proff_enet]);
 
     /* clear whole structure to make sure all reserved fields are zero */
     memset((void*)pram_ptr, 0, sizeof(fcc_enet_t));
@@ -385,14 +385,14 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
     /* 28.9 - (8)(9): clear out events in FCCE */
     /* 28.9 - (9): FCCM: mask all events */
     if(info->ether_index == 0) {
-       immr->im_cpm.im_cpm_fcc1.fcce = ~0x0;
-       immr->im_cpm.im_cpm_fcc1.fccm = 0;
+       cpm->im_cpm_fcc1.fcce = ~0x0;
+       cpm->im_cpm_fcc1.fccm = 0;
     } else if (info->ether_index == 1) {
-       immr->im_cpm.im_cpm_fcc2.fcce = ~0x0;
-       immr->im_cpm.im_cpm_fcc2.fccm = 0;
+       cpm->im_cpm_fcc2.fcce = ~0x0;
+       cpm->im_cpm_fcc2.fccm = 0;
     } else if (info->ether_index == 2) {
-       immr->im_cpm.im_cpm_fcc3.fcce = ~0x0;
-       immr->im_cpm.im_cpm_fcc3.fccm = 0;
+       cpm->im_cpm_fcc3.fcce = ~0x0;
+       cpm->im_cpm_fcc3.fccm = 0;
     }
 
     /* 28.9 - (10-12): we don't use ethernet interrupts */
@@ -413,11 +413,11 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
 
     /* 28.9 - (14): enable tx/rx in gfmr */
     if(info->ether_index == 0) {
-       immr->im_cpm.im_cpm_fcc1.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR;
+       cpm->im_cpm_fcc1.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR;
     } else if (info->ether_index == 1) {
-       immr->im_cpm.im_cpm_fcc2.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR;
+       cpm->im_cpm_fcc2.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR;
     } else if (info->ether_index == 2) {
-       immr->im_cpm.im_cpm_fcc3.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR;
+       cpm->im_cpm_fcc3.gfmr |= FCC_GFMR_ENT | FCC_GFMR_ENR;
     }
 
     return 1;
@@ -426,15 +426,15 @@ static int fec_init(struct eth_device* dev, bd_t *bis)
 static void fec_halt(struct eth_device* dev)
 {
     struct ether_fcc_info_s * info = dev->priv;
-    volatile immap_t *immr = (immap_t *)CFG_IMMR;
+    volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
 
     /* write GFMR: disable tx/rx */
     if(info->ether_index == 0) {
-       immr->im_cpm.im_cpm_fcc1.gfmr &= ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
+       cpm->im_cpm_fcc1.gfmr &= ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
     } else if(info->ether_index == 1) {
-       immr->im_cpm.im_cpm_fcc2.gfmr &= ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
+       cpm->im_cpm_fcc2.gfmr &= ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
     } else if(info->ether_index == 2) {
-       immr->im_cpm.im_cpm_fcc3.gfmr &= ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
+       cpm->im_cpm_fcc3.gfmr &= ~(FCC_GFMR_ENT | FCC_GFMR_ENR);
     }
 }
 

diff --git a/cpu/mpc85xx/serial_scc.c b/cpu/mpc85xx/serial_scc.c
index 4e925f8bea2d6464dc2f60fd16881ec1976ff894..7ee3cc8234c8781ba790a08eaa853d7fcb3967f6 100644 (file)
--- a/cpu/mpc85xx/serial_scc.c
+++ b/cpu/mpc85xx/serial_scc.c
@@ -88,17 +88,17 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int serial_init (void)
 {
-       volatile immap_t *im = (immap_t *)CFG_IMMR;
+       volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
        volatile ccsr_cpm_scc_t *sp;
        volatile scc_uart_t *up;
        volatile cbd_t *tbdf, *rbdf;
-       volatile ccsr_cpm_cp_t *cp = &(im->im_cpm.im_cpm_cp);
+       volatile ccsr_cpm_cp_t *cp = &(cpm->im_cpm_cp);
        uint    dpaddr;
 
        /* initialize pointers to SCC */
 
-       sp = (ccsr_cpm_scc_t *) &(im->im_cpm.im_cpm_scc[SCC_INDEX]);
-       up = (scc_uart_t *)&(im->im_cpm.im_dprambase[PROFF_SCC]);
+       sp = (ccsr_cpm_scc_t *) &(cpm->im_cpm_scc[SCC_INDEX]);
+       up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]);
 
        /* Disable transmitter/receiver.
        */
@@ -107,8 +107,8 @@ int serial_init (void)
        /* put the SCC channel into NMSI (non multiplexd serial interface)
         * mode and wire the selected SCC Tx and Rx clocks to BRGx (15-15).
         */
-       im->im_cpm.im_cpm_mux.cmxscr = \
-               (im->im_cpm.im_cpm_mux.cmxscr&~CMXSCR_MASK)|CMXSCR_VALUE;
+       cpm->im_cpm_mux.cmxscr = \
+               (cpm->im_cpm_mux.cmxscr&~CMXSCR_MASK)|CMXSCR_VALUE;
 
        /* Set up the baud rate generator.
        */
@@ -123,7 +123,7 @@ int serial_init (void)
        /* Set the physical address of the host memory buffers in
         * the buffer descriptors.
         */
-       rbdf = (cbd_t *)&(im->im_cpm.im_dprambase[dpaddr]);
+       rbdf = (cbd_t *)&(cpm->im_dprambase[dpaddr]);
        rbdf->cbd_bufaddr = (uint) (rbdf+2);
        rbdf->cbd_sc = BD_SC_EMPTY | BD_SC_WRAP;
        tbdf = rbdf + 1;
@@ -201,14 +201,13 @@ serial_putc(const char c)
 {
        volatile scc_uart_t     *up;
        volatile cbd_t          *tbdf;
-       volatile immap_t        *im;
+       volatile ccsr_cpm_t     *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
 
        if (c == '\n')
                serial_putc ('\r');
 
-       im = (immap_t *)CFG_IMMR;
-       up = (scc_uart_t *)&(im->im_cpm.im_dprambase[PROFF_SCC]);
-       tbdf = (cbd_t *)&(im->im_cpm.im_dprambase[up->scc_genscc.scc_tbase]);
+       up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]);
+       tbdf = (cbd_t *)&(cpm->im_dprambase[up->scc_genscc.scc_tbase]);
 
        /* Wait for last character to go.
         */
@@ -235,12 +234,11 @@ serial_getc(void)
 {
        volatile cbd_t          *rbdf;
        volatile scc_uart_t     *up;
-       volatile immap_t        *im;
+       volatile ccsr_cpm_t     *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
        unsigned char           c;
 
-       im = (immap_t *)CFG_IMMR;
-       up = (scc_uart_t *)&(im->im_cpm.im_dprambase[PROFF_SCC]);
-       rbdf = (cbd_t *)&(im->im_cpm.im_dprambase[up->scc_genscc.scc_rbase]);
+       up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]);
+       rbdf = (cbd_t *)&(cpm->im_dprambase[up->scc_genscc.scc_rbase]);
 
        /* Wait for character to show up.
         */
@@ -260,11 +258,10 @@ serial_tstc()
 {
        volatile cbd_t          *rbdf;
        volatile scc_uart_t     *up;
-       volatile immap_t        *im;
+       volatile ccsr_cpm_t     *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
 
-       im = (immap_t *)CFG_IMMR;
-       up = (scc_uart_t *)&(im->im_cpm.im_dprambase[PROFF_SCC]);
-       rbdf = (cbd_t *)&(im->im_cpm.im_dprambase[up->scc_genscc.scc_rbase]);
+       up = (scc_uart_t *)&(cpm->im_dprambase[PROFF_SCC]);
+       rbdf = (cbd_t *)&(cpm->im_dprambase[up->scc_genscc.scc_rbase]);
 
        return ((rbdf->cbd_sc & BD_SC_EMPTY) == 0);
 }

diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c
index 5c35d4a50af08b4852bd65f9129d68255532eeeb..293269c5732dfc96433e8fba18f36086de869088 100644 (file)
--- a/cpu/mpc85xx/speed.c
+++ b/cpu/mpc85xx/speed.c
@@ -55,12 +55,12 @@ int get_clocks (void)
 {
        sys_info_t sys_info;
 #if defined(CONFIG_CPM2)
-       volatile immap_t *immap = (immap_t *) CFG_IMMR;
+       volatile ccsr_cpm_t *cpm = (ccsr_cpm_t *)CFG_MPC85xx_CPM_ADDR;
        uint sccr, dfbrg;
 
        /* set VCO = 4 * BRG */
-       immap->im_cpm.im_cpm_intctl.sccr &= 0xfffffffc;
-       sccr = immap->im_cpm.im_cpm_intctl.sccr;
+       cpm->im_cpm_intctl.sccr &= 0xfffffffc;
+       sccr = cpm->im_cpm_intctl.sccr;
        dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
 #endif
        get_sys_info (&sys_info);

diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index df53bd2d8001eeac0707136f65d5a0490afb825b..393fdda0afab4e03a2859162820ea73a5392f26f 100644 (file)
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1636,9 +1636,11 @@ typedef struct immap {
        ccsr_tsec_t             im_tsec1;
        ccsr_tsec_t             im_tsec2;
        ccsr_pic_t              im_pic;
-       ccsr_cpm_t              im_cpm;
 } immap_t;
 
+#define CFG_MPC85xx_CPM_OFFSET (0x80000)
+#define CFG_MPC85xx_CPM_ADDR   (CFG_IMMR + CFG_MPC85xx_CPM_OFFSET)
+
 extern immap_t  *immr;
 
 #endif /*__IMMAP_85xx__*/

diff --git a/include/asm-ppc/iopin_85xx.h b/include/asm-ppc/iopin_85xx.h
index f854df633aac866755a194d7cf92beac2e079835..daddb554d4923aceaf1d0a241db4bfcbab6708c2 100644 (file)
--- a/include/asm-ppc/iopin_85xx.h
+++ b/include/asm-ppc/iopin_85xx.h
@@ -23,121 +23,121 @@ typedef struct {
 
 extern __inline__ void iopin_set_high (iopin_t * iopin)
 {
-       volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata;
+       volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata;
        datp[iopin->port * 8] |= (1 << (31 - iopin->pin));
 }
 
 extern __inline__ void iopin_set_low (iopin_t * iopin)
 {
-       volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata;
+       volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata;
        datp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
 }
 
 extern __inline__ uint iopin_is_high (iopin_t * iopin)
 {
-       volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata;
+       volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata;
        return (datp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
 }
 
 extern __inline__ uint iopin_is_low (iopin_t * iopin)
 {
-       volatile uint *datp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdata;
+       volatile uint *datp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdata;
        return ((datp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
 }
 
 extern __inline__ void iopin_set_out (iopin_t * iopin)
 {
-       volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira;
+       volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira;
        dirp[iopin->port * 8] |= (1 << (31 - iopin->pin));
 }
 
 extern __inline__ void iopin_set_in (iopin_t * iopin)
 {
-       volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira;
+       volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira;
        dirp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
 }
 
 extern __inline__ uint iopin_is_out (iopin_t * iopin)
 {
-       volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira;
+       volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira;
        return (dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
 }
 
 extern __inline__ uint iopin_is_in (iopin_t * iopin)
 {
-       volatile uint *dirp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.pdira;
+       volatile uint *dirp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.pdira;
        return ((dirp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
 }
 
 extern __inline__ void iopin_set_odr (iopin_t * iopin)
 {
-       volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra;
+       volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra;
        odrp[iopin->port * 8] |= (1 << (31 - iopin->pin));
 }
 
 extern __inline__ void iopin_set_act (iopin_t * iopin)
 {
-       volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra;
+       volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra;
        odrp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
 }
 
 extern __inline__ uint iopin_is_odr (iopin_t * iopin)
 {
-       volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra;
+       volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra;
        return (odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
 }
 
 extern __inline__ uint iopin_is_act (iopin_t * iopin)
 {
-       volatile uint *odrp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.podra;
+       volatile uint *odrp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.podra;
        return ((odrp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
 }
 
 extern __inline__ void iopin_set_ded (iopin_t * iopin)
 {
-       volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara;
+       volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara;
        parp[iopin->port * 8] |= (1 << (31 - iopin->pin));
 }
 
 extern __inline__ void iopin_set_gen (iopin_t * iopin)
 {
-       volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara;
+       volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara;
        parp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
 }
 
 extern __inline__ uint iopin_is_ded (iopin_t * iopin)
 {
-       volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara;
+       volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara;
        return (parp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
 }
 
 extern __inline__ uint iopin_is_gen (iopin_t * iopin)
 {
-       volatile uint *parp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.ppara;
+       volatile uint *parp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.ppara;
        return ((parp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
 }
 
 extern __inline__ void iopin_set_opt2 (iopin_t * iopin)
 {
-       volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora;
+       volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora;
        sorp[iopin->port * 8] |= (1 << (31 - iopin->pin));
 }
 
 extern __inline__ void iopin_set_opt1 (iopin_t * iopin)
 {
-       volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora;
+       volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora;
        sorp[iopin->port * 8] &= ~(1 << (31 - iopin->pin));
 }
 
 extern __inline__ uint iopin_is_opt2 (iopin_t * iopin)
 {
-       volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora;
+       volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora;
        return (sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1;
 }
 
 extern __inline__ uint iopin_is_opt1 (iopin_t * iopin)
 {
-       volatile uint *sorp = &((immap_t *) CFG_IMMR)->im_cpm.im_cpm_iop.psora;
+       volatile uint *sorp = &((ccsr_cpm_t *) CFG_MPC85xx_CPM_ADDR)->im_cpm_iop.psora;
        return ((sorp[iopin->port * 8] >> (31 - iopin->pin)) & 1) ^ 1;
 }
 

diff --git a/include/ioports.h b/include/ioports.h
index cfba667cab25fdd2d15eecd751c01e95e47daaf1..1134ea52081c9e55851330e2fd50e92452c817b3 100644 (file)
--- a/include/ioports.h
+++ b/include/ioports.h
@@ -26,7 +26,7 @@ typedef struct {
  * a 0x20 byte boundary
  */
 #ifdef CONFIG_MPC85xx
-#define ioport_addr(im, idx) (ioport_t *)((uint)&((im)->im_cpm.im_cpm_iop) + ((idx)*0x20))
+#define ioport_addr(im, idx) (ioport_t *)((uint)&(im->im_cpm_iop) + ((idx)*0x20))
 #else
 #define ioport_addr(im, idx) (ioport_t *)((uint)&(im)->im_ioport + ((idx)*0x20))
 #endif