MX53: Handle silicon revision 2.1 case

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>

diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c
index 6f4e8db74d0ffa589e40274230b2fe93c465aa8e..40b8b5640b3ee87b9abf3e18d246f7d7222eed15 100644 (file)
--- a/arch/arm/cpu/armv7/mx5/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -65,14 +65,10 @@ u32 get_cpu_rev(void)
                break;
        }
 #else
-       switch (reg) {
-       case 0x20:
-               system_rev |= CHIP_REV_2_0;
-               break;
-       default:
+       if (reg < 0x20)
                system_rev |= CHIP_REV_1_0;
-               break;
-       }
+       else
+               system_rev |= reg;
 #endif
        return system_rev;
 }