colibri_vf: Add pinmux entries for GPIOs

Inorder to use the pins as GPIO, apart from setting the alt-function,
pinmuxing need to be done, this patch adds pinmux entries of
few GPIOs.

Acked-by: Stefan Agner <stefan@agner.ch>
Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com>

diff --git a/arch/arm/include/asm/arch-vf610/iomux-vf610.h b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
index 9226e69fec1e9629efc448342054978f35be079d..e22e3f94c489095950bb3d6b0302418d6f5e2774 100644 (file)
--- a/arch/arm/include/asm/arch-vf610/iomux-vf610.h
+++ b/arch/arm/include/asm/arch-vf610/iomux-vf610.h
@@ -32,22 +32,56 @@
 #define VF610_QSPI_PAD_CTRL    (PAD_CTL_SPEED_HIGH | PAD_CTL_DSE_150ohm | \
                                PAD_CTL_PUS_22K_UP | PAD_CTL_OBE_IBE_ENABLE)
 
+#define VF610_GPIO_PAD_CTRL    (PAD_CTL_SPEED_MED | PAD_CTL_DSE_50ohm | \
+                               PAD_CTL_PUS_47K_UP | PAD_CTL_IBE_ENABLE)
+
 enum {
        VF610_PAD_PTA6__RMII0_CLKIN             = IOMUX_PAD(0x0000, 0x0000, 2, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTA6__RMII0_CLKOUT            = IOMUX_PAD(0x0000, 0x0000, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTA7__GPIO_134                = IOMUX_PAD(0x0218, 0x0218, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTA17__GPIO_7                 = IOMUX_PAD(0x001c, 0x001c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTA20__GPIO_10                = IOMUX_PAD(0x0028, 0x0028, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTA21__GPIO_11                = IOMUX_PAD(0x002c, 0x002c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTA30__GPIO_20                = IOMUX_PAD(0x0050, 0x0050, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTA31__GPIO_21                = IOMUX_PAD(0x0054, 0x0054, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB0__GPIO_22                 = IOMUX_PAD(0x0058, 0x0058, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB1__GPIO_23                 = IOMUX_PAD(0x005C, 0x005C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTB4__UART1_TX                = IOMUX_PAD(0x0068, 0x0068, 2, 0x0380, 0, VF610_UART_PAD_CTRL),
        VF610_PAD_PTB5__UART1_RX                = IOMUX_PAD(0x006c, 0x006c, 2, 0x037c, 0, VF610_UART_PAD_CTRL),
+       VF610_PAD_PTB6__GPIO_28                 = IOMUX_PAD(0x0070, 0x0070, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB7__GPIO_29                 = IOMUX_PAD(0x0074, 0x0074, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB8__GPIO_30                 = IOMUX_PAD(0x0078, 0x0078, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB9__GPIO_31                 = IOMUX_PAD(0x007C, 0x007C, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTB10__UART0_TX               = IOMUX_PAD(0x0080, 0x0080, 1, __NA_, 0, VF610_UART_PAD_CTRL),
        VF610_PAD_PTB11__UART0_RX               = IOMUX_PAD(0x0084, 0x0084, 1, __NA_, 0, VF610_UART_PAD_CTRL),
+       VF610_PAD_PTB12__GPIO_34                = IOMUX_PAD(0x0088, 0x0088, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB13__GPIO_35                = IOMUX_PAD(0x008c, 0x008c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB16__GPIO_38                = IOMUX_PAD(0x0098, 0x0098, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB17__GPIO_39                = IOMUX_PAD(0x009c, 0x009c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB18__GPIO_40                = IOMUX_PAD(0x00a0, 0x00a0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB21__GPIO_43                = IOMUX_PAD(0x00ac, 0x00ac, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB22__GPIO_44                = IOMUX_PAD(0x00b0, 0x00b0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB23__GPIO_93                = IOMUX_PAD(0x0174, 0x0174, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB26__GPIO_96                = IOMUX_PAD(0x0180, 0x0180, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTB28__GPIO_98                = IOMUX_PAD(0x0188, 0x0188, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTC1__GPIO_46                 = IOMUX_PAD(0x00b8, 0x00b8, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC1__RMII0_MDIO              = IOMUX_PAD(0x00b8, 0x00b8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC0__GPIO_45                 = IOMUX_PAD(0x00b4, 0x00b4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC0__RMII0_MDC               = IOMUX_PAD(0x00b4, 0x00b4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTC2__RMII0_CRS_DV            = IOMUX_PAD(0x00bc, 0x00bc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC2__GPIO_47                 = IOMUX_PAD(0x00bc, 0x00bc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC3__RMII0_RD1               = IOMUX_PAD(0x00c0, 0x00c0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC3__GPIO_48                 = IOMUX_PAD(0x00c0, 0x00c0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC4__RMII0_RD0               = IOMUX_PAD(0x00c4, 0x00c4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC4__GPIO_49                 = IOMUX_PAD(0x00c4, 0x00c4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC5__RMII0_RXER              = IOMUX_PAD(0x00c8, 0x00c8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC5__GPIO_50                 = IOMUX_PAD(0x00c8, 0x00c8, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC6__RMII0_TD1               = IOMUX_PAD(0x00cc, 0x00cc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC6__GPIO_51                 = IOMUX_PAD(0x00cc, 0x00cc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC7__RMII0_TD0               = IOMUX_PAD(0x00D0, 0x00D0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC7__GPIO_52                 = IOMUX_PAD(0x00D0, 0x00D0, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC8__RMII0_TXEN              = IOMUX_PAD(0x00D4, 0x00D4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC8__GPIO_53                 = IOMUX_PAD(0x00D4, 0x00D4, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTC10__RMII1_MDIO             = IOMUX_PAD(0x00dc, 0x00dc, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTC9__RMII1_MDC               = IOMUX_PAD(0x00d8, 0x00d8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTC11__RMII1_CRS_DV           = IOMUX_PAD(0x00e0, 0x00e0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
@@ -57,6 +91,8 @@ enum {
        VF610_PAD_PTC15__RMII1_TD1              = IOMUX_PAD(0x00f0, 0x00f0, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTC16__RMII1_TD0              = IOMUX_PAD(0x00f4, 0x00f4, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
        VF610_PAD_PTC17__RMII1_TXEN             = IOMUX_PAD(0x00f8, 0x00f8, 1, __NA_, 0, VF610_ENET_PAD_CTRL),
+       VF610_PAD_PTC29__GPIO_102               = IOMUX_PAD(0x0198, 0x0198, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTC30__GPIO_103               = IOMUX_PAD(0x019c, 0x019c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTA24__ESDHC1_CLK             = IOMUX_PAD(0x0038, 0x0038, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
        VF610_PAD_PTA25__ESDHC1_CMD             = IOMUX_PAD(0x003c, 0x003c, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
        VF610_PAD_PTA26__ESDHC1_DAT0            = IOMUX_PAD(0x0040, 0x0040, 5, __NA_, 0, VF610_SDHC_PAD_CTRL),
@@ -66,13 +102,21 @@ enum {
        VF610_PAD_PTB14__I2C0_SCL               = IOMUX_PAD(0x0090, 0x0090, 2, 0x033c, 1, VF610_I2C_PAD_CTRL),
        VF610_PAD_PTB15__I2C0_SDA               = IOMUX_PAD(0x0094, 0x0094, 2, 0x0340, 1, VF610_I2C_PAD_CTRL),
        VF610_PAD_PTD31__NF_IO15                = IOMUX_PAD(0x00fc, 0x00fc, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD31__GPIO_63                = IOMUX_PAD(0x00fc, 0x00fc, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD30__NF_IO14                = IOMUX_PAD(0x0100, 0x0100, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD30__GPIO_64                = IOMUX_PAD(0x0100, 0x0100, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD29__NF_IO13                = IOMUX_PAD(0x0104, 0x0104, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD29__GPIO_65                = IOMUX_PAD(0x0104, 0x0104, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD28__NF_IO12                = IOMUX_PAD(0x0108, 0x0108, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD28__GPIO_66                = IOMUX_PAD(0x0108, 0x0108, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD27__NF_IO11                = IOMUX_PAD(0x010c, 0x010c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD27__GPIO_67                = IOMUX_PAD(0x010c, 0x010c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD26__NF_IO10                = IOMUX_PAD(0x0110, 0x0110, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD26__GPIO_68                = IOMUX_PAD(0x0110, 0x0110, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD25__NF_IO9                 = IOMUX_PAD(0x0114, 0x0114, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD25__GPIO_69                = IOMUX_PAD(0x0114, 0x0114, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD24__NF_IO8                 = IOMUX_PAD(0x0118, 0x0118, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
+       VF610_PAD_PTD24__GPIO_70                = IOMUX_PAD(0x0118, 0x0118, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD23__NF_IO7                 = IOMUX_PAD(0x011c, 0x011c, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
        VF610_PAD_PTD0__QSPI0_A_QSCK            = IOMUX_PAD(0x013c, 0x013c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
        VF610_PAD_PTD1__QSPI0_A_CS0             = IOMUX_PAD(0x0140, 0x0140, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
@@ -83,9 +127,14 @@ enum {
        VF610_PAD_PTD7__QSPI0_B_QSCK            = IOMUX_PAD(0x0158, 0x0158, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
        VF610_PAD_PTD8__QSPI0_B_CS0             = IOMUX_PAD(0x015c, 0x015c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
        VF610_PAD_PTD9__QSPI0_B_DATA3           = IOMUX_PAD(0x0160, 0x0160, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+       VF610_PAD_PTD9__GPIO_88                 = IOMUX_PAD(0x0160, 0x0160, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD10__QSPI0_B_DATA2          = IOMUX_PAD(0x0164, 0x0164, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+       VF610_PAD_PTD10__GPIO_89                = IOMUX_PAD(0x0164, 0x0164, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD11__QSPI0_B_DATA1          = IOMUX_PAD(0x0168, 0x0168, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+       VF610_PAD_PTD11__GPIO_90                = IOMUX_PAD(0x0168, 0x0168, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD12__QSPI0_B_DATA0          = IOMUX_PAD(0x016c, 0x016c, 1, __NA_, 0, VF610_QSPI_PAD_CTRL),
+       VF610_PAD_PTD12__GPIO_91                = IOMUX_PAD(0x016c, 0x016c, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
+       VF610_PAD_PTD13__GPIO_92                = IOMUX_PAD(0x0170, 0x0170, 0, __NA_, 0, VF610_GPIO_PAD_CTRL),
        VF610_PAD_PTD22__NF_IO6                 = IOMUX_PAD(0x0120, 0x0120, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL),
        VF610_PAD_PTD21__NF_IO5                 = IOMUX_PAD(0x0124, 0x0124, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), 
        VF610_PAD_PTD20__NF_IO4                 = IOMUX_PAD(0x0128, 0x0128, 2, __NA_, 0, VF610_NFC_IO_PAD_CTRL), 

diff --git a/board/toradex/colibri_vf/colibri_vf.c b/board/toradex/colibri_vf/colibri_vf.c
index 31ebb1935fd6af62765e16dc1d6aba37eebf916b..e354c6d1d1d07d6ebca394aca51caa29b0699657 100644 (file)
--- a/board/toradex/colibri_vf/colibri_vf.c
+++ b/board/toradex/colibri_vf/colibri_vf.c
@@ -146,6 +146,62 @@ static void setup_iomux_nfc(void)
 }
 #endif
 
+#ifdef CONFIG_VYBRID_GPIO
+static void setup_iomux_gpio(void)
+{
+       static const iomux_v3_cfg_t gpio_pads[] = {
+               VF610_PAD_PTA17__GPIO_7,
+               VF610_PAD_PTA20__GPIO_10,
+               VF610_PAD_PTA21__GPIO_11,
+               VF610_PAD_PTA30__GPIO_20,
+               VF610_PAD_PTA31__GPIO_21,
+               VF610_PAD_PTB0__GPIO_22,
+               VF610_PAD_PTB1__GPIO_23,
+               VF610_PAD_PTB6__GPIO_28,
+               VF610_PAD_PTB7__GPIO_29,
+               VF610_PAD_PTB8__GPIO_30,
+               VF610_PAD_PTB9__GPIO_31,
+               VF610_PAD_PTB12__GPIO_34,
+               VF610_PAD_PTB13__GPIO_35,
+               VF610_PAD_PTB16__GPIO_38,
+               VF610_PAD_PTB17__GPIO_39,
+               VF610_PAD_PTB18__GPIO_40,
+               VF610_PAD_PTB21__GPIO_43,
+               VF610_PAD_PTB22__GPIO_44,
+               VF610_PAD_PTC0__GPIO_45,
+               VF610_PAD_PTC1__GPIO_46,
+               VF610_PAD_PTC2__GPIO_47,
+               VF610_PAD_PTC3__GPIO_48,
+               VF610_PAD_PTC4__GPIO_49,
+               VF610_PAD_PTC5__GPIO_50,
+               VF610_PAD_PTC6__GPIO_51,
+               VF610_PAD_PTC7__GPIO_52,
+               VF610_PAD_PTC8__GPIO_53,
+               VF610_PAD_PTD31__GPIO_63,
+               VF610_PAD_PTD30__GPIO_64,
+               VF610_PAD_PTD29__GPIO_65,
+               VF610_PAD_PTD28__GPIO_66,
+               VF610_PAD_PTD27__GPIO_67,
+               VF610_PAD_PTD26__GPIO_68,
+               VF610_PAD_PTD25__GPIO_69,
+               VF610_PAD_PTD24__GPIO_70,
+               VF610_PAD_PTD9__GPIO_88,
+               VF610_PAD_PTD10__GPIO_89,
+               VF610_PAD_PTD11__GPIO_90,
+               VF610_PAD_PTD12__GPIO_91,
+               VF610_PAD_PTD13__GPIO_92,
+               VF610_PAD_PTB23__GPIO_93,
+               VF610_PAD_PTB26__GPIO_96,
+               VF610_PAD_PTB28__GPIO_98,
+               VF610_PAD_PTC29__GPIO_102,
+               VF610_PAD_PTC30__GPIO_103,
+               VF610_PAD_PTA7__GPIO_134,
+       };
+
+       imx_iomux_v3_setup_multiple_pads(gpio_pads, ARRAY_SIZE(gpio_pads));
+}
+#endif
+
 #ifdef CONFIG_FSL_ESDHC
 struct fsl_esdhc_cfg esdhc_cfg[1] = {
        {ESDHC1_BASE_ADDR},
@@ -304,6 +360,10 @@ int board_early_init_f(void)
        setup_iomux_nfc();
 #endif
 
+#ifdef CONFIG_VYBRID_GPIO
+       setup_iomux_gpio();
+#endif
+
        return 0;
 }