arm: dts: socfpga: Increase the spi-max-frequency for QSPI flash

With a working QSPI calibration, the SCLK can now run up to 100MHz

Signed-off-by: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Dinh Nguyen <dinh.linux@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Stefan Roese <sr@denx.de>
Cc: Vikas Manocha <vikas.manocha@st.com>
Cc: Jagannadh Teki <jteki@openedev.com>
Cc: Pavel Machek <pavel@denx.de>
Reviewed-by: Marek Vasut <marex@denx.de>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Jagan Teki <jteki@openedev.com>

diff --git a/arch/arm/dts/socfpga_cyclone5_socdk.dts b/arch/arm/dts/socfpga_cyclone5_socdk.dts
index 546560979bd97809dd550c1f31437ab23c7f979e..9eb5a2209c63b721ec5bc7fd773572703ef368be 100644 (file)
--- a/arch/arm/dts/socfpga_cyclone5_socdk.dts
+++ b/arch/arm/dts/socfpga_cyclone5_socdk.dts
@@ -89,7 +89,7 @@
                #size-cells = <1>;
                compatible = "n25q00";
                reg = <0>;      /* chip select */
-               spi-max-frequency = <50000000>;
+               spi-max-frequency = <100000000>;
                m25p,fast-read;
                page-size = <256>;
                block-size = <16>; /* 2^16, 64KB */