]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
imx51: synchronise device tree with linux
authorMarcel Ziswiler <marcel.ziswiler@toradex.com>
Sat, 22 Oct 2022 21:59:41 +0000 (23:59 +0200)
committerStefano Babic <sbabic@denx.de>
Mon, 24 Oct 2022 11:43:21 +0000 (13:43 +0200)
Synchronise device tree with linux v6.0-rc1.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
arch/arm/dts/imx51.dtsi

index 7ebb46ce9e362cb0dcab01f817686b621086a6a4..592d9c23a447fc90968a384498eb7ce026aada69 100644 (file)
 
        clocks {
                ckil {
-                       compatible = "fsl,imx-ckil", "fixed-clock";
+                       compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <32768>;
                };
 
                ckih1 {
-                       compatible = "fsl,imx-ckih1", "fixed-clock";
+                       compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <0>;
                };
 
                ckih2 {
-                       compatible = "fsl,imx-ckih2", "fixed-clock";
+                       compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <0>;
                };
 
                osc {
-                       compatible = "fsl,imx-osc", "fixed-clock";
+                       compatible = "fixed-clock";
                        #clock-cells = <0>;
                        clock-frequency = <24000000>;
                };
                ports = <&ipu_di0>, <&ipu_di1>;
        };
 
-       soc {
+       soc: soc {
                #address-cells = <1>;
                #size-cells = <1>;
                compatible = "simple-bus";
                        };
                };
 
-               bus@70000000 { /* AIPS1 */
+               aips1: bus@70000000 { /* AIPS1 */
                        compatible = "fsl,aips-bus", "simple-bus";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        reg = <0x70000000 0x10000000>;
                        ranges;
 
-                       spba@70000000 {
+                       spba-bus@70000000 {
                                compatible = "fsl,spba-bus", "simple-bus";
                                #address-cells = <1>;
                                #size-cells = <1>;
                                        clocks = <&clks IMX5_CLK_UART3_IPG_GATE>,
                                                 <&clks IMX5_CLK_UART3_PER_GATE>;
                                        clock-names = "ipg", "per";
+                                       dmas = <&sdma 43 5 1>, <&sdma 44 5 2>;
+                                       dma-names = "rx", "tx";
                                        status = "disabled";
                                };
 
                                clocks = <&clks IMX5_CLK_UART1_IPG_GATE>,
                                         <&clks IMX5_CLK_UART1_PER_GATE>;
                                clock-names = "ipg", "per";
+                               dmas = <&sdma 18 4 1>, <&sdma 19 4 2>;
+                               dma-names = "rx", "tx";
                                status = "disabled";
                        };
 
                                clocks = <&clks IMX5_CLK_UART2_IPG_GATE>,
                                         <&clks IMX5_CLK_UART2_PER_GATE>;
                                clock-names = "ipg", "per";
+                               dmas = <&sdma 16 4 1>, <&sdma 17 4 2>;
+                               dma-names = "rx", "tx";
                                status = "disabled";
                        };
 
                        };
                };
 
-               bus@80000000 {  /* AIPS2 */
+               aips2: bus@80000000 {   /* AIPS2 */
                        compatible = "fsl,aips-bus", "simple-bus";
                        #address-cells = <1>;
                        #size-cells = <1>;
                        };
 
                        iim: efuse@83f98000 {
-                               compatible = "fsl,imx51-iim", "fsl,imx27-iim";
+                               compatible = "fsl,imx51-iim", "fsl,imx27-iim", "syscon";
                                reg = <0x83f98000 0x4000>;
                                interrupts = <69>;
                                clocks = <&clks IMX5_CLK_IIM_GATE>;