arm: dts: imx8m*-venice-*: add I2C GPIO bus recovery support

Add I2C GPIO bus recovery support by adding scl-gpios and sda-gpios for the
various I2C busses on Gateworks Venice boards.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>

diff --git a/arch/arm/dts/imx8mm-venice-gw700x.dtsi b/arch/arm/dts/imx8mm-venice-gw700x.dtsi
index 66a0d103c90fa73308c84b362c1cecc457ae6aa2..c305e325d00733476a9b31aeddcb14314813df36 100644 (file)
--- a/arch/arm/dts/imx8mm-venice-gw700x.dtsi
+++ b/arch/arm/dts/imx8mm-venice-gw700x.dtsi
@@ -119,8 +119,11 @@
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
@@ -365,8 +368,11 @@
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        eeprom@52 {
@@ -435,6 +441,13 @@
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
@@ -442,6 +455,13 @@
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_uart2: uart2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140

diff --git a/arch/arm/dts/imx8mm-venice-gw7901.dts b/arch/arm/dts/imx8mm-venice-gw7901.dts
index d3ee6fc4baabd7bdba3e5936dc6fdaecc5707bac..826627bd4503bbda192d4c8dd93012c74087850c 100644 (file)
--- a/arch/arm/dts/imx8mm-venice-gw7901.dts
+++ b/arch/arm/dts/imx8mm-venice-gw7901.dts
@@ -326,8 +326,11 @@
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
@@ -477,8 +480,11 @@
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        pmic@4b {
@@ -600,8 +606,11 @@
 
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        leds_gpio: gpio@20 {
@@ -673,8 +682,11 @@
 
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
@@ -852,6 +864,13 @@
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
@@ -859,6 +878,13 @@
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
@@ -866,6 +892,13 @@
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
@@ -873,6 +906,13 @@
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20        0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21        0x400001c3
+               >;
+       };
+
        pinctrl_ksz: kszgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18       0x41

diff --git a/arch/arm/dts/imx8mm-venice-gw7902.dts b/arch/arm/dts/imx8mm-venice-gw7902.dts
index 921bffae0cc944d3b865b4c45a93952401149207..11481e09c75b7d3ea72d29abe89b5c96ab6d849e 100644 (file)
--- a/arch/arm/dts/imx8mm-venice-gw7902.dts
+++ b/arch/arm/dts/imx8mm-venice-gw7902.dts
@@ -299,8 +299,11 @@
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
@@ -567,8 +570,11 @@
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
@@ -586,16 +592,22 @@
 /* off-board header */
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
 /* off-board header */
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
@@ -801,6 +813,13 @@
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
@@ -808,6 +827,13 @@
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
@@ -815,6 +841,13 @@
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
@@ -822,6 +855,13 @@
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20        0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21        0x400001c3
+               >;
+       };
+
        pinctrl_gpio_leds: gpioledgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SAI5_RXD0_GPIO3_IO21       0x19

diff --git a/arch/arm/dts/imx8mm-venice-gw7903.dts b/arch/arm/dts/imx8mm-venice-gw7903.dts
index 19f6d2943d26ccc587c7ed0f50335146b4850b6c..1ec91c5c6a49aed935a15b09d61f1bea5ece5785 100644 (file)
--- a/arch/arm/dts/imx8mm-venice-gw7903.dts
+++ b/arch/arm/dts/imx8mm-venice-gw7903.dts
@@ -265,8 +265,11 @@
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
@@ -397,8 +400,11 @@
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        pmic@4b {
@@ -520,8 +526,11 @@
 
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
@@ -681,6 +690,13 @@
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
@@ -688,6 +704,13 @@
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
@@ -695,6 +718,13 @@
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_gpio_leds: gpioledgrp {
                fsl,pins = <
                        MX8MM_IOMUXC_SPDIF_EXT_CLK_GPIO5_IO5    0x19

diff --git a/arch/arm/dts/imx8mm-venice-gw7904.dts b/arch/arm/dts/imx8mm-venice-gw7904.dts
index a67771d0214640b4203689b20a1ff09b9b6f49aa..93c9651c315de3f95c99f7bc44918719bd898f86 100644 (file)
--- a/arch/arm/dts/imx8mm-venice-gw7904.dts
+++ b/arch/arm/dts/imx8mm-venice-gw7904.dts
@@ -315,8 +315,11 @@
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
@@ -441,8 +444,11 @@
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        pmic@4b {
@@ -564,8 +570,11 @@
 
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
@@ -582,8 +591,11 @@
 
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gpioled: gpio@27 {
@@ -738,6 +750,13 @@
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MM_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
@@ -745,6 +764,13 @@
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MM_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
@@ -752,6 +778,13 @@
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MM_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
@@ -759,6 +792,13 @@
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MM_IOMUXC_I2C4_SCL_GPIO5_IO20        0x400001c3
+                       MX8MM_IOMUXC_I2C4_SDA_GPIO5_IO21        0x400001c3
+               >;
+       };
+
        pinctrl_pcie0: pciegrp {
                fsl,pins = <
                        MX8MM_IOMUXC_ECSPI2_MOSI_GPIO5_IO11     0x41

diff --git a/arch/arm/dts/imx8mn-venice-gw7902.dts b/arch/arm/dts/imx8mn-venice-gw7902.dts
index 029ccdbee7d503a6b59d90cf70ee345f71697d44..97582db71ca8858ed0e47bec6a47565dfeab7119 100644 (file)
--- a/arch/arm/dts/imx8mn-venice-gw7902.dts
+++ b/arch/arm/dts/imx8mn-venice-gw7902.dts
@@ -297,8 +297,11 @@
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
@@ -565,8 +568,11 @@
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
@@ -584,16 +590,22 @@
 /* off-board header */
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
 /* off-board header */
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
@@ -744,6 +756,13 @@
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_I2C1_SCL_GPIO5_IO14        0x400001c3
+                       MX8MN_IOMUXC_I2C1_SDA_GPIO5_IO15        0x400001c3
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL          0x400001c3
@@ -751,6 +770,13 @@
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_I2C2_SCL_GPIO5_IO16        0x400001c3
+                       MX8MN_IOMUXC_I2C2_SDA_GPIO5_IO17        0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MN_IOMUXC_I2C3_SCL_I2C3_SCL          0x400001c3
@@ -758,6 +784,13 @@
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_I2C3_SCL_GPIO5_IO18        0x400001c3
+                       MX8MN_IOMUXC_I2C3_SDA_GPIO5_IO19        0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL          0x400001c3
@@ -765,6 +798,13 @@
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MN_IOMUXC_I2C4_SCL_GPIO5_IO20        0x400001c3
+                       MX8MN_IOMUXC_I2C4_SDA_GPIO5_IO21        0x400001c3
+               >;
+       };
+
        pinctrl_gpio_leds: gpioledgrp {
                fsl,pins = <
                        MX8MN_IOMUXC_SAI5_RXD0_GPIO3_IO21       0x19

diff --git a/arch/arm/dts/imx8mp-venice-gw74xx.dts b/arch/arm/dts/imx8mp-venice-gw74xx.dts
index 06b4c93c587650e2b001a875c2a647e9763b7774..ceeca4966fc5c8a06694f38527691b2564f409db 100644 (file)
--- a/arch/arm/dts/imx8mp-venice-gw74xx.dts
+++ b/arch/arm/dts/imx8mp-venice-gw74xx.dts
@@ -253,8 +253,11 @@
 
 &i2c1 {
        clock-frequency = <100000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c1>;
+       pinctrl-1 = <&pinctrl_i2c1_gpio>;
+       scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        gsc: gsc@20 {
@@ -477,8 +480,11 @@
 
 &i2c2 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c2>;
+       pinctrl-1 = <&pinctrl_i2c2_gpio>;
+       scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 
        accelerometer@19 {
@@ -556,16 +562,22 @@
 /* off-board header */
 &i2c3 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c3>;
+       pinctrl-1 = <&pinctrl_i2c3_gpio>;
+       scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
 /* off-board header */
 &i2c4 {
        clock-frequency = <400000>;
-       pinctrl-names = "default";
+       pinctrl-names = "default", "gpio";
        pinctrl-0 = <&pinctrl_i2c4>;
+       pinctrl-1 = <&pinctrl_i2c4_gpio>;
+       scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
+       sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
        status = "okay";
 };
 
@@ -800,6 +812,13 @@
                >;
        };
 
+       pinctrl_i2c1_gpio: i2c1gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C1_SCL__GPIO5_IO14       0x400001c2
+                       MX8MP_IOMUXC_I2C1_SDA__GPIO5_IO15       0x400001c2
+               >;
+       };
+
        pinctrl_i2c2: i2c2grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL         0x400001c2
@@ -807,6 +826,13 @@
                >;
        };
 
+       pinctrl_i2c2_gpio: i2c2gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C2_SCL__GPIO5_IO16       0x400001c3
+                       MX8MP_IOMUXC_I2C2_SDA__GPIO5_IO17       0x400001c3
+               >;
+       };
+
        pinctrl_i2c3: i2c3grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL         0x400001c2
@@ -814,6 +840,13 @@
                >;
        };
 
+       pinctrl_i2c3_gpio: i2c3gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C3_SCL__GPIO5_IO18       0x400001c3
+                       MX8MP_IOMUXC_I2C3_SDA__GPIO5_IO19       0x400001c3
+               >;
+       };
+
        pinctrl_i2c4: i2c4grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL         0x400001c2
@@ -821,6 +854,13 @@
                >;
        };
 
+       pinctrl_i2c4_gpio: i2c4gpiogrp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_I2C4_SCL__GPIO5_IO20       0x400001c3
+                       MX8MP_IOMUXC_I2C4_SDA__GPIO5_IO21       0x400001c3
+               >;
+       };
+
        pinctrl_ksz: kszgrp {
                fsl,pins = <
                        MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29       0x150 /* IRQ# */