mmc: fsl_esdhc: Update esdhc driver for iMX6SX

The reset value of "uSDHCx_INT_STATUS_EN" register is changed to 0
on iMX6SX. So the fsl_esdhc driver must update to set the register,
otherwise no state can be detected.

Signed-off-by: Ye.Li <B37916@freescale.com>

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 26406072482f202a8ca6e2fa6cd8a54c87fbea4c..59b470d01b31e6a8270d6b0d9700635a679aa92c 100644 (file)
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -23,6 +23,13 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+#define SDHCI_IRQ_EN_BITS              (IRQSTATEN_CC | IRQSTATEN_TC | \
+                               IRQSTATEN_CINT | \
+                               IRQSTATEN_CTOE | IRQSTATEN_CCE | IRQSTATEN_CEBE | \
+                               IRQSTATEN_CIE | IRQSTATEN_DTOE | IRQSTATEN_DCE | \
+                               IRQSTATEN_DEBE | IRQSTATEN_BRR | IRQSTATEN_BWR | \
+                               IRQSTATEN_DINT)
+
 struct fsl_esdhc {
        uint    dsaddr;         /* SDMA system address register */
        uint    blkattr;        /* Block attributes register */
@@ -558,6 +565,7 @@ int fsl_esdhc_initialize(bd_t *bis, struct fsl_esdhc_cfg *cfg)
        esdhc_setbits32(&regs->sysctl, SYSCTL_PEREN | SYSCTL_HCKEN
                                | SYSCTL_IPGEN | SYSCTL_CKEN);
 
+       writel(SDHCI_IRQ_EN_BITS, &regs->irqstaten);
        memset(&cfg->cfg, 0, sizeof(cfg->cfg));
 
        voltage_caps = 0;