dt-bindings: imx8mq-clock: add mainline definitions

Sync the clock ids with the mainline kernel

077de6e1c9f ("clk: imx8mq: add PLL monitor output")

Signed-off-by: Angus Ainslie <angus@akkea.ca>
Reviewed-by: Marek Vasut <marex@denx.de>

diff --git a/include/dt-bindings/clock/imx8mq-clock.h b/include/dt-bindings/clock/imx8mq-clock.h
index 9b8045d75b8b67f439facdc10b09e8668f6657b9..82e907ce7bdd3308e03471018aa498e4699b9871 100644 (file)
--- a/include/dt-bindings/clock/imx8mq-clock.h
+++ b/include/dt-bindings/clock/imx8mq-clock.h
@@ -431,6 +431,20 @@
 
 #define IMX8MQ_CLK_A53_CORE                    289
 
-#define IMX8MQ_CLK_END                         290
+#define IMX8MQ_CLK_MON_AUDIO_PLL1_DIV          290
+#define IMX8MQ_CLK_MON_AUDIO_PLL2_DIV          291
+#define IMX8MQ_CLK_MON_VIDEO_PLL1_DIV          292
+#define IMX8MQ_CLK_MON_GPU_PLL_DIV             293
+#define IMX8MQ_CLK_MON_VPU_PLL_DIV             294
+#define IMX8MQ_CLK_MON_ARM_PLL_DIV             295
+#define IMX8MQ_CLK_MON_SYS_PLL1_DIV            296
+#define IMX8MQ_CLK_MON_SYS_PLL2_DIV            297
+#define IMX8MQ_CLK_MON_SYS_PLL3_DIV            298
+#define IMX8MQ_CLK_MON_DRAM_PLL_DIV            299
+#define IMX8MQ_CLK_MON_VIDEO_PLL2_DIV          300
+#define IMX8MQ_CLK_MON_SEL                     301
+#define IMX8MQ_CLK_MON_CLK2_OUT                        302
+
+#define IMX8MQ_CLK_END                         303
 
 #endif /* __DT_BINDINGS_CLOCK_IMX8MQ_H */