]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
mmc: zynq_sdhci: Add support and quirk for HS400
authorAshok Reddy Soma <ashok.reddy.soma@amd.com>
Tue, 10 Jan 2023 11:31:24 +0000 (04:31 -0700)
committerJaehoon Chung <jh80.chung@samsung.com>
Tue, 31 Jan 2023 13:02:27 +0000 (22:02 +0900)
Add support for HS400 in mode2timing array.
Add a quirk for Versal NET platform to indicate that HS400 is supported
through bit63 of capability register.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com>
drivers/mmc/zynq_sdhci.c

index 4f0dde326c24c675b02cf44f9385253bcc34d003..91e309d2752f22b3963bd2c6a40d9e1ff16b17c8 100644 (file)
@@ -153,6 +153,7 @@ static const u8 mode2timing[] = {
        [UHS_DDR50] = MMC_TIMING_UHS_DDR50,
        [UHS_SDR104] = MMC_TIMING_UHS_SDR104,
        [MMC_HS_200] = MMC_TIMING_MMC_HS200,
+       [MMC_HS_400] = MMC_TIMING_MMC_HS400,
 };
 
 #if defined(CONFIG_ARCH_VERSAL_NET)
@@ -1133,6 +1134,10 @@ static int arasan_sdhci_probe(struct udevice *dev)
        if (priv->no_1p8)
                host->quirks |= SDHCI_QUIRK_NO_1_8_V;
 
+       if (CONFIG_IS_ENABLED(ARCH_VERSAL_NET) &&
+           device_is_compatible(dev, "xlnx,versal-net-5.1-emmc"))
+               host->quirks |= SDHCI_QUIRK_CAPS_BIT63_FOR_HS400;
+
        plat->cfg.f_max = CONFIG_ZYNQ_SDHCI_MAX_FREQ;
 
        ret = mmc_of_parse(dev, &plat->cfg);