]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
board: ls1043ardb: Modify pin-muxing code for USB and QE-HDLC
authorZhao Qiang <qiang.zhao@nxp.com>
Fri, 5 Feb 2016 02:04:19 +0000 (10:04 +0800)
committerYork Sun <york.sun@nxp.com>
Wed, 24 Feb 2016 16:51:15 +0000 (08:51 -0800)
QE-HDLC and USB multi-use the pins, modify the pin-muxing code
for them, when set "hwconfig=qe-hdlc" in uboot, assign the pins
to QE-HDLC, if not, assgin it to USB

Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
board/freescale/ls1043ardb/ls1043ardb.c

index dafe7c91a4391a6034cf5d86f87c0d07cf991473..66d974a40b71da44c46c19314806154a5c4adcba 100644 (file)
@@ -114,18 +114,24 @@ int config_board_mux(void)
        struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
        u32 usb_pwrfault;
 
+       if (hwconfig("qe-hdlc")) {
+               out_be32(&scfg->rcwpmuxcr0,
+                        (in_be32(&scfg->rcwpmuxcr0) & ~0xff00) | 0x6600);
+               printf("Assign to qe-hdlc clk, rcwpmuxcr0=%x\n",
+                      in_be32(&scfg->rcwpmuxcr0));
+       } else {
 #ifdef CONFIG_HAS_FSL_XHCI_USB
-       out_be32(&scfg->rcwpmuxcr0, 0x3333);
-       out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1);
-       usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED <<
-                       SCFG_USBPWRFAULT_USB3_SHIFT) |
-                       (SCFG_USBPWRFAULT_DEDICATED <<
-                       SCFG_USBPWRFAULT_USB2_SHIFT) |
-                       (SCFG_USBPWRFAULT_SHARED <<
-                        SCFG_USBPWRFAULT_USB1_SHIFT);
-       out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault);
+               out_be32(&scfg->rcwpmuxcr0, 0x3333);
+               out_be32(&scfg->usbdrvvbus_selcr, SCFG_USBDRVVBUS_SELCR_USB1);
+               usb_pwrfault = (SCFG_USBPWRFAULT_DEDICATED <<
+                               SCFG_USBPWRFAULT_USB3_SHIFT) |
+                               (SCFG_USBPWRFAULT_DEDICATED <<
+                               SCFG_USBPWRFAULT_USB2_SHIFT) |
+                               (SCFG_USBPWRFAULT_SHARED <<
+                                SCFG_USBPWRFAULT_USB1_SHIFT);
+               out_be32(&scfg->usbpwrfault_selcr, usb_pwrfault);
 #endif
-
+       }
        return 0;
 }
 
@@ -152,6 +158,16 @@ int misc_init_r(void)
 }
 #endif
 
+void fdt_del_qe(void *blob)
+{
+       int nodeoff = 0;
+
+       while ((nodeoff = fdt_node_offset_by_compatible(blob, 0,
+                               "fsl,qe")) >= 0) {
+               fdt_del_node(blob, nodeoff);
+       }
+}
+
 int ft_board_setup(void *blob, bd_t *bd)
 {
        u64 base[CONFIG_NR_DRAM_BANKS];
@@ -169,6 +185,23 @@ int ft_board_setup(void *blob, bd_t *bd)
 #ifdef CONFIG_SYS_DPAA_FMAN
        fdt_fixup_fman_ethernet(blob);
 #endif
+
+       /*
+        * qe-hdlc and usb multi-use the pins,
+        * when set hwconfig to qe-hdlc, delete usb node.
+        */
+       if (hwconfig("qe-hdlc"))
+#ifdef CONFIG_HAS_FSL_XHCI_USB
+               fdt_del_node_and_alias(blob, "usb1");
+#endif
+       /*
+        * qe just support qe-uart and qe-hdlc,
+        * if qe-uart and qe-hdlc are not set in hwconfig,
+        * delete qe node.
+        */
+       if (!hwconfig("qe-uart") && !hwconfig("qe-hdlc"))
+               fdt_del_qe(blob);
+
        return 0;
 }