]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
net: emaclite: Use indirect register access for tx_ping/pong
authorMichal Simek <michal.simek@xilinx.com>
Thu, 10 Dec 2015 14:22:21 +0000 (15:22 +0100)
committerMichal Simek <michal.simek@xilinx.com>
Wed, 27 Jan 2016 14:55:51 +0000 (15:55 +0100)
Do initialization via indirect register access.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
drivers/net/xilinx_emaclite.c

index 9d413a0bbf8d8c2916f8238b1d05b194ecfae381..654ad58cea3cadec16d2267aa17d40e544a074c5 100644 (file)
@@ -335,28 +335,28 @@ static int emaclite_init(struct eth_device *dev, bd_t *bis)
  * TX - TX_PING & TX_PONG initialization
  */
        /* Restart PING TX */
-       out_be32 (dev->iobase + XEL_TSR_OFFSET, 0);
+       out_be32(&regs->tx_ping_tsr, 0);
        /* Copy MAC address */
-       xemaclite_alignedwrite(dev->enetaddr, dev->iobase, ENET_ADDR_LENGTH);
+       xemaclite_alignedwrite(dev->enetaddr, (u32)&regs->tx_ping,
+                              ENET_ADDR_LENGTH);
        /* Set the length */
-       out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
+       out_be32(&regs->tx_ping_tplr, ENET_ADDR_LENGTH);
        /* Update the MAC address in the EMAC Lite */
-       out_be32 (dev->iobase + XEL_TSR_OFFSET, XEL_TSR_PROG_MAC_ADDR);
+       out_be32(&regs->tx_ping_tsr, XEL_TSR_PROG_MAC_ADDR);
        /* Wait for EMAC Lite to finish with the MAC address update */
-       while ((in_be32 (dev->iobase + XEL_TSR_OFFSET) &
+       while ((in_be32 (&regs->tx_ping_tsr) &
                XEL_TSR_PROG_MAC_ADDR) != 0)
                ;
 
        if (emaclite->txpp) {
                /* The same operation with PONG TX */
-               out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET, 0);
-               xemaclite_alignedwrite(dev->enetaddr, dev->iobase +
-                       XEL_BUFFER_OFFSET, ENET_ADDR_LENGTH);
-               out_be32 (dev->iobase + XEL_TPLR_OFFSET, ENET_ADDR_LENGTH);
-               out_be32 (dev->iobase + XEL_TSR_OFFSET + XEL_BUFFER_OFFSET,
-                       XEL_TSR_PROG_MAC_ADDR);
-               while ((in_be32 (dev->iobase + XEL_TSR_OFFSET +
-                       XEL_BUFFER_OFFSET) & XEL_TSR_PROG_MAC_ADDR) != 0)
+               out_be32(&regs->tx_pong_tsr, 0);
+               xemaclite_alignedwrite(dev->enetaddr, (u32)&regs->tx_pong,
+                                      ENET_ADDR_LENGTH);
+               out_be32(&regs->tx_pong_tplr, ENET_ADDR_LENGTH);
+               out_be32(&regs->tx_pong_tsr, XEL_TSR_PROG_MAC_ADDR);
+               while ((in_be32(&regs->tx_pong_tsr) &
+                      XEL_TSR_PROG_MAC_ADDR) != 0)
                        ;
        }