tsec: Fix a bug in soft-resetting

SOFT_RESET must be asserted for at least 3 TX clocks.  Usually, that's about 30
clock cycles, so it's been mostly working.  But we had no guarantee, and at
slower bitrates, it's just over a microsecond (over 1000 clock cycles).  This
enforces a 2 microsecond gap between assertion and deassertion.

Signed-off-by: Andy Fleming <afleming@freescale.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>

diff --git a/drivers/net/tsec.c b/drivers/net/tsec.c
index dc90f23859fe6518d272c2453cf7b6ddb11704fe..9edba6a7b75618bac96af9919f47964b2493b063 100644 (file)
--- a/drivers/net/tsec.c
+++ b/drivers/net/tsec.c
@@ -158,6 +158,7 @@ int tsec_initialize(bd_t * bis, struct tsec_info_struct *tsec_info)
 
        /* Reset the MAC */
        priv->regs->maccfg1 |= MACCFG1_SOFT_RESET;
+       udelay(2);  /* Soft Reset must be asserted for 3 TX clocks */
        priv->regs->maccfg1 &= ~(MACCFG1_SOFT_RESET);
 
 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \