* Provide extended interface to Linux boot loader
* S-Record download
* network boot
- * PCMCIA / CompactFlash / ATA disk / SCSI ... boot
+ * ATA disk / SCSI ... boot
- create ARMBoot project (http://sourceforge.net/projects/armboot)
- add other CPU families (starting with ARM)
- create U-Boot project (http://sourceforge.net/projects/u-boot)
peripherals. Sub-commands allow bus enumeration, displaying and
changing configuration space and a few other features.
-config CMD_PCMCIA
- bool "pinit - Set up PCMCIA device"
- help
- Provides a means to initialise a PCMCIA (Personal Computer Memory
- Card International Association) device. This is an old standard from
- about 1990. These devices are typically removable memory or network
- cards using a standard 68-pin connector.
-
config CMD_PINMUX
bool "pinmux - show pins muxing"
default y if PINCTRL
ifdef CONFIG_PCI
obj-$(CONFIG_CMD_PCI) += pci.o
endif
-obj-$(CONFIG_CMD_PCMCIA) += pcmcia.o
obj-$(CONFIG_CMD_PINMUX) += pinmux.o
obj-$(CONFIG_CMD_PXE) += pxe.o
obj-$(CONFIG_CMD_WOL) += wol.o
#include <asm/byteorder.h>
#include <asm/io.h>
-#if defined(CONFIG_IDE_PCMCIA)
-# include <pcmcia.h>
-#endif
-
#include <ide.h>
#include <ata.h>
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2000-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- ********************************************************************
- *
- * Lots of code copied from:
- *
- * m8xx_pcmcia.c - Linux PCMCIA socket driver for the mpc8xx series.
- * (C) 1999-2000 Magnus Damm <damm@bitsmart.com>
- *
- * "The ExCA standard specifies that socket controllers should provide
- * two IO and five memory windows per socket, which can be independently
- * configured and positioned in the host address space and mapped to
- * arbitrary segments of card address space. " - David A Hinds. 1999
- *
- * This controller does _not_ meet the ExCA standard.
- *
- * m8xx pcmcia controller brief info:
- * + 8 windows (attrib, mem, i/o)
- * + up to two slots (SLOT_A and SLOT_B)
- * + inputpins, outputpins, event and mask registers.
- * - no offset register. sigh.
- *
- * Because of the lacking offset register we must map the whole card.
- * We assign each memory window PCMCIA_MEM_WIN_SIZE address space.
- * Make sure there is (PCMCIA_MEM_WIN_SIZE * PCMCIA_MEM_WIN_NO
- * * PCMCIA_SOCKETS_NO) bytes at PCMCIA_MEM_WIN_BASE.
- * The i/o windows are dynamically allocated at PCMCIA_IO_WIN_BASE.
- * They are maximum 64KByte each...
- */
-
-/* #define DEBUG 1 */
-
-/*
- * PCMCIA support
- */
-#include <common.h>
-#include <command.h>
-#include <config.h>
-#include <pcmcia.h>
-#include <asm/io.h>
-
-/* -------------------------------------------------------------------- */
-
-#if defined(CONFIG_CMD_PCMCIA)
-
-extern int pcmcia_on (void);
-extern int pcmcia_off (void);
-
-int do_pinit (cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
-{
- int rcode = 0;
-
- if (argc != 2) {
- printf ("Usage: pinit {on | off}\n");
- return 1;
- }
- if (strcmp(argv[1],"on") == 0) {
- rcode = pcmcia_on ();
- } else if (strcmp(argv[1],"off") == 0) {
- rcode = pcmcia_off ();
- } else {
- printf ("Usage: pinit {on | off}\n");
- return 1;
- }
-
- return rcode;
-}
-
-U_BOOT_CMD(
- pinit, 2, 0, do_pinit,
- "PCMCIA sub-system",
- "on - power on PCMCIA socket\n"
- "pinit off - power off PCMCIA socket"
-);
-
-#endif
-
-/* -------------------------------------------------------------------- */
-
-#undef CHECK_IDE_DEVICE
-
-#if defined(CONFIG_PXA_PCMCIA)
-#define CHECK_IDE_DEVICE
-#endif
-
-#ifdef CHECK_IDE_DEVICE
-
-int ide_devices_found;
-static uchar *known_cards[] = {
- (uchar *)"ARGOSY PnPIDE D5",
- NULL
-};
-
-#define MAX_TUPEL_SZ 512
-#define MAX_FEATURES 4
-
-#define MAX_IDENT_CHARS 64
-#define MAX_IDENT_FIELDS 4
-
-#define indent "\t "
-
-static void print_funcid (int func)
-{
- puts (indent);
- switch (func) {
- case CISTPL_FUNCID_MULTI:
- puts (" Multi-Function");
- break;
- case CISTPL_FUNCID_MEMORY:
- puts (" Memory");
- break;
- case CISTPL_FUNCID_SERIAL:
- puts (" Serial Port");
- break;
- case CISTPL_FUNCID_PARALLEL:
- puts (" Parallel Port");
- break;
- case CISTPL_FUNCID_FIXED:
- puts (" Fixed Disk");
- break;
- case CISTPL_FUNCID_VIDEO:
- puts (" Video Adapter");
- break;
- case CISTPL_FUNCID_NETWORK:
- puts (" Network Adapter");
- break;
- case CISTPL_FUNCID_AIMS:
- puts (" AIMS Card");
- break;
- case CISTPL_FUNCID_SCSI:
- puts (" SCSI Adapter");
- break;
- default:
- puts (" Unknown");
- break;
- }
- puts (" Card\n");
-}
-
-static void print_fixed (volatile uchar *p)
-{
- if (p == NULL)
- return;
-
- puts(indent);
-
- switch (*p) {
- case CISTPL_FUNCE_IDE_IFACE:
- { uchar iface = *(p+2);
-
- puts ((iface == CISTPL_IDE_INTERFACE) ? " IDE" : " unknown");
- puts (" interface ");
- break;
- }
- case CISTPL_FUNCE_IDE_MASTER:
- case CISTPL_FUNCE_IDE_SLAVE:
- { uchar f1 = *(p+2);
- uchar f2 = *(p+4);
-
- puts ((f1 & CISTPL_IDE_SILICON) ? " [silicon]" : " [rotating]");
-
- if (f1 & CISTPL_IDE_UNIQUE)
- puts (" [unique]");
-
- puts ((f1 & CISTPL_IDE_DUAL) ? " [dual]" : " [single]");
-
- if (f2 & CISTPL_IDE_HAS_SLEEP)
- puts (" [sleep]");
-
- if (f2 & CISTPL_IDE_HAS_STANDBY)
- puts (" [standby]");
-
- if (f2 & CISTPL_IDE_HAS_IDLE)
- puts (" [idle]");
-
- if (f2 & CISTPL_IDE_LOW_POWER)
- puts (" [low power]");
-
- if (f2 & CISTPL_IDE_REG_INHIBIT)
- puts (" [reg inhibit]");
-
- if (f2 & CISTPL_IDE_HAS_INDEX)
- puts (" [index]");
-
- if (f2 & CISTPL_IDE_IOIS16)
- puts (" [IOis16]");
-
- break;
- }
- }
- putc ('\n');
-}
-
-static int identify (volatile uchar *p)
-{
- uchar id_str[MAX_IDENT_CHARS];
- uchar data;
- uchar *t;
- uchar **card;
- int i, done;
-
- if (p == NULL)
- return (0); /* Don't know */
-
- t = id_str;
- done =0;
-
- for (i=0; i<=4 && !done; ++i, p+=2) {
- while ((data = *p) != '\0') {
- if (data == 0xFF) {
- done = 1;
- break;
- }
- *t++ = data;
- if (t == &id_str[MAX_IDENT_CHARS-1]) {
- done = 1;
- break;
- }
- p += 2;
- }
- if (!done)
- *t++ = ' ';
- }
- *t = '\0';
- while (--t > id_str) {
- if (*t == ' ')
- *t = '\0';
- else
- break;
- }
- puts ((char *)id_str);
- putc ('\n');
-
- for (card=known_cards; *card; ++card) {
- debug ("## Compare against \"%s\"\n", *card);
- if (strcmp((char *)*card, (char *)id_str) == 0) { /* found! */
- debug ("## CARD FOUND ##\n");
- return (1);
- }
- }
-
- return (0); /* don't know */
-}
-
-int check_ide_device (int slot)
-{
- volatile uchar *ident = NULL;
- volatile uchar *feature_p[MAX_FEATURES];
- volatile uchar *p, *start, *addr;
- int n_features = 0;
- uchar func_id = ~0;
- uchar code, len;
- ushort config_base = 0;
- int found = 0;
- int i;
-
- addr = (volatile uchar *)(CONFIG_SYS_PCMCIA_MEM_ADDR +
- CONFIG_SYS_PCMCIA_MEM_SIZE * (slot * 4));
- debug ("PCMCIA MEM: %08lX\n", (ulong)addr);
-
- start = p = (volatile uchar *) addr;
-
- while ((p - start) < MAX_TUPEL_SZ) {
-
- code = *p; p += 2;
-
- if (code == 0xFF) { /* End of chain */
- break;
- }
-
- len = *p; p += 2;
-#if defined(DEBUG) && (DEBUG > 1)
- { volatile uchar *q = p;
- printf ("\nTuple code %02x length %d\n\tData:",
- code, len);
-
- for (i = 0; i < len; ++i) {
- printf (" %02x", *q);
- q+= 2;
- }
- }
-#endif /* DEBUG */
- switch (code) {
- case CISTPL_VERS_1:
- ident = p + 4;
- break;
- case CISTPL_FUNCID:
- /* Fix for broken SanDisk which may have 0x80 bit set */
- func_id = *p & 0x7F;
- break;
- case CISTPL_FUNCE:
- if (n_features < MAX_FEATURES)
- feature_p[n_features++] = p;
- break;
- case CISTPL_CONFIG:
- config_base = (*(p+6) << 8) + (*(p+4));
- debug ("\n## Config_base = %04x ###\n", config_base);
- default:
- break;
- }
- p += 2 * len;
- }
-
- found = identify (ident);
-
- if (func_id != ((uchar)~0)) {
- print_funcid (func_id);
-
- if (func_id == CISTPL_FUNCID_FIXED)
- found = 1;
- else
- return (1); /* no disk drive */
- }
-
- for (i=0; i<n_features; ++i) {
- print_fixed (feature_p[i]);
- }
-
- if (!found) {
- printf ("unknown card type\n");
- return (1);
- }
-
- ide_devices_found |= (1 << slot);
-
- /* set I/O area in config reg -> only valid for ARGOSY D5!!! */
- *((uchar *)(addr + config_base)) = 1;
-#if 0
- printf("\n## Config_base = %04x ###\n", config_base);
- printf("Configuration Option Register: %02x @ %x\n", readb(addr + config_base), addr + config_base);
- printf("Card Configuration and Status Register: %02x\n", readb(addr + config_base + 2));
- printf("Pin Replacement Register Register: %02x\n", readb(addr + config_base + 4));
- printf("Socket and Copy Register: %02x\n", readb(addr + config_base + 6));
-#endif
- return (0);
-}
-
-#endif /* CHECK_IDE_DEVICE */
}
#endif
-#if defined(CONFIG_CMD_PCMCIA) && !defined(CONFIG_IDE)
-static int initr_pcmcia(void)
-{
- puts("PCMCIA:");
- pcmcia_init();
- return 0;
-}
-#endif
-
#if defined(CONFIG_IDE) && !defined(CONFIG_BLK)
static int initr_ide(void)
{
#ifdef CONFIG_POST
initr_post,
#endif
-#if defined(CONFIG_CMD_PCMCIA) && !defined(CONFIG_IDE)
- initr_pcmcia,
-#endif
#if defined(CONFIG_IDE) && !defined(CONFIG_BLK)
initr_ide,
#endif
+++ /dev/null
-
-U-Boot MARUBUN MR-SHPC-01 PCMCIA controller driver
- Last update 21/11/2007 by Nobuhiro Iwamatsu
-
-========================================================================================
-
-0. What's this?
- This driver supports MARUBUN MR-SHPC-01.
- url: http://www.marubun.co.jp/product/semicon/devices/qgc18e0000002n2z.html
- (Sorry Japanese only.)
-
- This chip is used with SuperH well, and adopted by the
- reference board.
- ex. * MS7750SE01
- * MS7722SE01
- * other
-
- This chip doesn't support CardBus.
-
-1. base source code
- The code is based on sources from the Linux kernel
- ( arch/sh/kernel/cf-enabler.c ).
-
-2. How to use
- The options you have to specify in the config file are (with the
- value for my board as an example):
-
- * CONFIG_MARUBUN_PCCARD
- If you want to use this device driver, should define CONFIG_MARUBUN_PCCARD.
- ex. #define CONFIG_MARUBUN_PCCARD
-
- * CONFIG_PCMCIA_SLOT_A
- Most devices have only one slot. You should define CONFIG_PCMCIA_SLOT_A .
- ex. #define CONFIG_PCMCIA_SLOT_A 1
-
- * CONFIG_SYS_MARUBUN_MRSHPC
- This is MR-SHPC-01 PCMCIA controller base address.
- You should do the setting matched to your environment.
- ex. #define CONFIG_SYS_MARUBUN_MRSHPC 0xb03fffe0
- ( for MS7722SE01 environment )
-
- * CONFIG_SYS_MARUBUN_MW1
- This is MR-SHPC-01 memory window base address.
- You should do the setting matched to your environment.
- ex. #define CONFIG_SYS_MARUBUN_MW1 0xb0400000
- ( for MS7722SE01 environment )
-
- * CONFIG_SYS_MARUBUN_MW1
- This is MR-SHPC-01 attribute window base address.
- You should do the setting matched to your environment.
- ex. #define CONFIG_SYS_MARUBUN_MW2 0xb0500000
- ( for MS7722SE01 environment )
-
- * CONFIG_SYS_MARUBUN_MW1
- This is MR-SHPC-01 I/O window base address.
- You should do the setting matched to your environment.
- ex. #define CONFIG_SYS_MARUBUN_IO 0xb0600000
- ( for MS7722SE01 environment )
-
-3. Other
- * Check Compact Flash only.
- * Maybe, NE2000 compatible NIC is sure to move.
-
-Copyright (c) 2007
- Nobuhiro Iwamatsu <iwamatsu@nigaur.org>
- Address where the board is mapped
-#define CONFIG_DRIVER_NE2000_CCR (0x28000000+0x3f8)
-
-- Address of the CCR (card configuration register). It could be found
-by enabling DEBUG in cmd_pcmcia.c. If this is not defined nothing is
-done as far as PCMCIA support is concerned.
-
-#define CONFIG_DRIVER_NE2000_VAL (0x20)
-
-- The value to be written in the CCR. It selects among different I/O
-spaces that could be used by the card.
-
Enjoy!
source "drivers/pch/Kconfig"
-source "drivers/pcmcia/Kconfig"
-
source "drivers/phy/Kconfig"
source "drivers/phy/allwinner/Kconfig"
obj-$(CONFIG_MMC) += mmc/
obj-$(CONFIG_NVME) += nvme/
obj-$(CONFIG_PCI_ENDPOINT) += pci_endpoint/
-obj-y += pcmcia/
obj-y += dfu/
obj-$(CONFIG_PCH) += pch/
obj-y += phy/allwinner/
}
}
-#ifdef CONFIG_DRIVER_NE2000_CCR
- {
- vu_char *p = (vu_char *) CONFIG_DRIVER_NE2000_CCR;
-
- PRINTK("CCR before is %x\n", *p);
- *p = CONFIG_DRIVER_NE2000_VAL;
- PRINTK("CCR after is %x\n", *p);
- }
-#endif
-
nic.base = (u8 *) CONFIG_DRIVER_NE2000_BASE;
nic.data = nic.base + DP_DATA;
+++ /dev/null
-# SPDX-License-Identifier: GPL-2.0+
-#
-# (C) Copyright 2000-2007
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-
-obj-$(CONFIG_MARUBUN_PCCARD) += marubun_pcmcia.o
+++ /dev/null
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * Marubun MR-SHPC-01 PCMCIA controller device driver
- *
- * (c) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
- */
-
-#include <common.h>
-#include <config.h>
-#include <pcmcia.h>
-#include <asm/io.h>
-
-#undef CONFIG_PCMCIA
-
-#if defined(CONFIG_CMD_PCMCIA)
-#define CONFIG_PCMCIA
-#endif
-
-#if defined(CONFIG_IDE)
-#define CONFIG_PCMCIA
-#endif
-
-#if defined(CONFIG_PCMCIA)
-
-/* MR-SHPC-01 register */
-#define MRSHPC_MODE (CONFIG_SYS_MARUBUN_MRSHPC + 4)
-#define MRSHPC_OPTION (CONFIG_SYS_MARUBUN_MRSHPC + 6)
-#define MRSHPC_CSR (CONFIG_SYS_MARUBUN_MRSHPC + 8)
-#define MRSHPC_ISR (CONFIG_SYS_MARUBUN_MRSHPC + 10)
-#define MRSHPC_ICR (CONFIG_SYS_MARUBUN_MRSHPC + 12)
-#define MRSHPC_CPWCR (CONFIG_SYS_MARUBUN_MRSHPC + 14)
-#define MRSHPC_MW0CR1 (CONFIG_SYS_MARUBUN_MRSHPC + 16)
-#define MRSHPC_MW1CR1 (CONFIG_SYS_MARUBUN_MRSHPC + 18)
-#define MRSHPC_IOWCR1 (CONFIG_SYS_MARUBUN_MRSHPC + 20)
-#define MRSHPC_MW0CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 22)
-#define MRSHPC_MW1CR2 (CONFIG_SYS_MARUBUN_MRSHPC + 24)
-#define MRSHPC_IOWCR2 (CONFIG_SYS_MARUBUN_MRSHPC + 26)
-#define MRSHPC_CDCR (CONFIG_SYS_MARUBUN_MRSHPC + 28)
-#define MRSHPC_PCIC_INFO (CONFIG_SYS_MARUBUN_MRSHPC + 30)
-
-int pcmcia_on (void)
-{
- printf("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
-
- /* Init */
- outw( 0x0000 , MRSHPC_MODE );
-
- if ((inw(MRSHPC_CSR) & 0x000c) == 0){ /* if card detect is true */
- if ((inw(MRSHPC_CSR) & 0x0080) == 0){
- outw(0x0674 ,MRSHPC_CPWCR); /* Card Vcc is 3.3v? */
- }else{
- outw(0x0678 ,MRSHPC_CPWCR); /* Card Vcc is 5V */
- }
- udelay( 100000 ); /* wait for power on */
- }else{
- return 1;
- }
- /*
- * PC-Card window open
- * flag == COMMON/ATTRIBUTE/IO
- */
- /* common window open */
- outw(0x8a84,MRSHPC_MW0CR1); /* window 0xb8400000 */
- if ((inw(MRSHPC_CSR) & 0x4000) != 0)
- outw(0x0b00,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 1 */
- else
- outw(0x0300,MRSHPC_MW0CR2); /* common mode & bus width 16bit SWAP = 0 */
-
- /* attribute window open */
- outw(0x8a85,MRSHPC_MW1CR1); /* window 0xb8500000 */
- if ((inw(MRSHPC_CSR) & 0x4000) != 0)
- outw(0x0a00,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 1 */
- else
- outw(0x0200,MRSHPC_MW1CR2); /* attribute mode & bus width 16bit SWAP = 0 */
-
- /* I/O window open */
- outw(0x8a86,MRSHPC_IOWCR1); /* I/O window 0xb8600000 */
- outw(0x0008,MRSHPC_CDCR); /* I/O card mode */
- if ((inw(MRSHPC_CSR) & 0x4000) != 0)
- outw(0x0a00,MRSHPC_IOWCR2); /* bus width 16bit SWAP = 1 */
- else
- outw(0x0200,MRSHPC_IOWCR2); /* bus width 16bit SWAP = 0 */
-
- outw(0x0000,MRSHPC_ISR);
- outw(0x2000,MRSHPC_ICR);
- outb(0x00,(CONFIG_SYS_MARUBUN_MW2 + 0x206));
- outb(0x42,(CONFIG_SYS_MARUBUN_MW2 + 0x200));
-
- return 0;
-}
-
-int pcmcia_off (void)
-{
- printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
-
- return 0;
-}
-
-#endif /* CONFIG_PCMCIA */
return string_to_ip(env_get(var));
}
-int pcmcia_init (void);
-
#ifdef CONFIG_LED_STATUS
# include <status_led.h>
#endif
+++ /dev/null
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- */
-
-#ifndef _PCMCIA_H
-#define _PCMCIA_H
-
-#include <common.h>
-#include <config.h>
-
-/*
- * Allow configuration to select PCMCIA slot,
- * or try to generate a useful default
- */
-#if defined(CONFIG_CMD_PCMCIA)
-
-#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
-# error "PCMCIA Slot not configured"
-#endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
-
-/* Make sure exactly one slot is defined - we support only one for now */
-#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
-#error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured
-#endif
-#if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
-#error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
-#endif
-
-#ifndef PCMCIA_SOCKETS_NO
-#define PCMCIA_SOCKETS_NO 1
-#endif
-#ifndef PCMCIA_MEM_WIN_NO
-#define PCMCIA_MEM_WIN_NO 4
-#endif
-#define PCMCIA_IO_WIN_NO 2
-
-/* define _slot_ to be able to optimize macros */
-#ifdef CONFIG_PCMCIA_SLOT_A
-# define _slot_ 0
-# define PCMCIA_SLOT_MSG "slot A"
-# define PCMCIA_SLOT_x PCMCIA_PSLOT_A
-#else
-# define _slot_ 1
-# define PCMCIA_SLOT_MSG "slot B"
-# define PCMCIA_SLOT_x PCMCIA_PSLOT_B
-#endif
-
-/*
- * This structure is used to address each window in the PCMCIA controller.
- *
- * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly
- * after pcmcia_win_t[n]...
- */
-
-typedef struct {
- ulong br;
- ulong or;
-} pcmcia_win_t;
-
-/**********************************************************************/
-
-/*
- * CIS Tupel codes
- */
-#define CISTPL_NULL 0x00
-#define CISTPL_DEVICE 0x01
-#define CISTPL_LONGLINK_CB 0x02
-#define CISTPL_INDIRECT 0x03
-#define CISTPL_CONFIG_CB 0x04
-#define CISTPL_CFTABLE_ENTRY_CB 0x05
-#define CISTPL_LONGLINK_MFC 0x06
-#define CISTPL_BAR 0x07
-#define CISTPL_PWR_MGMNT 0x08
-#define CISTPL_EXTDEVICE 0x09
-#define CISTPL_CHECKSUM 0x10
-#define CISTPL_LONGLINK_A 0x11
-#define CISTPL_LONGLINK_C 0x12
-#define CISTPL_LINKTARGET 0x13
-#define CISTPL_NO_LINK 0x14
-#define CISTPL_VERS_1 0x15
-#define CISTPL_ALTSTR 0x16
-#define CISTPL_DEVICE_A 0x17
-#define CISTPL_JEDEC_C 0x18
-#define CISTPL_JEDEC_A 0x19
-#define CISTPL_CONFIG 0x1a
-#define CISTPL_CFTABLE_ENTRY 0x1b
-#define CISTPL_DEVICE_OC 0x1c
-#define CISTPL_DEVICE_OA 0x1d
-#define CISTPL_DEVICE_GEO 0x1e
-#define CISTPL_DEVICE_GEO_A 0x1f
-#define CISTPL_MANFID 0x20
-#define CISTPL_FUNCID 0x21
-#define CISTPL_FUNCE 0x22
-#define CISTPL_SWIL 0x23
-#define CISTPL_END 0xff
-
-/*
- * CIS Function ID codes
- */
-#define CISTPL_FUNCID_MULTI 0x00
-#define CISTPL_FUNCID_MEMORY 0x01
-#define CISTPL_FUNCID_SERIAL 0x02
-#define CISTPL_FUNCID_PARALLEL 0x03
-#define CISTPL_FUNCID_FIXED 0x04
-#define CISTPL_FUNCID_VIDEO 0x05
-#define CISTPL_FUNCID_NETWORK 0x06
-#define CISTPL_FUNCID_AIMS 0x07
-#define CISTPL_FUNCID_SCSI 0x08
-
-/*
- * Fixed Disk FUNCE codes
- */
-#define CISTPL_IDE_INTERFACE 0x01
-
-#define CISTPL_FUNCE_IDE_IFACE 0x01
-#define CISTPL_FUNCE_IDE_MASTER 0x02
-#define CISTPL_FUNCE_IDE_SLAVE 0x03
-
-/* First feature byte */
-#define CISTPL_IDE_SILICON 0x04
-#define CISTPL_IDE_UNIQUE 0x08
-#define CISTPL_IDE_DUAL 0x10
-
-/* Second feature byte */
-#define CISTPL_IDE_HAS_SLEEP 0x01
-#define CISTPL_IDE_HAS_STANDBY 0x02
-#define CISTPL_IDE_HAS_IDLE 0x04
-#define CISTPL_IDE_LOW_POWER 0x08
-#define CISTPL_IDE_REG_INHIBIT 0x10
-#define CISTPL_IDE_HAS_INDEX 0x20
-#define CISTPL_IDE_IOIS16 0x40
-
-#endif
-
-#endif /* _PCMCIA_H */
+++ /dev/null
-/*
- * yenta.h 1.20 2001/08/24 12:15:34
- *
- * The contents of this file are subject to the Mozilla Public License
- * Version 1.1 (the "License"); you may not use this file except in
- * compliance with the License. You may obtain a copy of the License
- * at http://www.mozilla.org/MPL/
- *
- * Software distributed under the License is distributed on an "AS IS"
- * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See
- * the License for the specific language governing rights and
- * limitations under the License.
- *
- * The initial developer of the original code is David A. Hinds
- * <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
- * are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
- *
- * Alternatively, the contents of this file may be used under the
- * terms of the GNU General Public License version 2 (the "GPL"), in
- * which case the provisions of the GPL are applicable instead of the
- * above. If you wish to allow the use of your version of this file
- * only under the terms of the GPL and not to allow others to use
- * your version of this file under the MPL, indicate your decision by
- * deleting the provisions above and replace them with the notice and
- * other provisions required by the GPL. If you do not delete the
- * provisions above, a recipient may use your version of this file
- * under either the MPL or the GPL.
- */
-
-#ifndef _LINUX_YENTA_H
-#define _LINUX_YENTA_H
-
-/* PCI Configuration Registers */
-
-#define PCI_STATUS_CAPLIST 0x10
-#define PCI_CB_CAPABILITY_POINTER 0x14 /* 8 bit */
-#define PCI_CAPABILITY_ID 0x00 /* 8 bit */
-#define PCI_CAPABILITY_PM 0x01
-#define PCI_NEXT_CAPABILITY 0x01 /* 8 bit */
-#define PCI_PM_CAPABILITIES 0x02 /* 16 bit */
-#define PCI_PMCAP_PME_D3COLD 0x8000
-#define PCI_PMCAP_PME_D3HOT 0x4000
-#define PCI_PMCAP_PME_D2 0x2000
-#define PCI_PMCAP_PME_D1 0x1000
-#define PCI_PMCAP_PME_D0 0x0800
-#define PCI_PMCAP_D2_CAP 0x0400
-#define PCI_PMCAP_D1_CAP 0x0200
-#define PCI_PMCAP_DYN_DATA 0x0100
-#define PCI_PMCAP_DSI 0x0020
-#define PCI_PMCAP_AUX_PWR 0x0010
-#define PCI_PMCAP_PMECLK 0x0008
-#define PCI_PMCAP_VERSION_MASK 0x0007
-#define PCI_PM_CONTROL_STATUS 0x04 /* 16 bit */
-#define PCI_PMCS_PME_STATUS 0x8000
-#define PCI_PMCS_DATASCALE_MASK 0x6000
-#define PCI_PMCS_DATASCALE_SHIFT 13
-#define PCI_PMCS_DATASEL_MASK 0x1e00
-#define PCI_PMCS_DATASEL_SHIFT 9
-#define PCI_PMCS_PME_ENABLE 0x0100
-#define PCI_PMCS_PWR_STATE_MASK 0x0003
-#define PCI_PMCS_PWR_STATE_D0 0x0000
-#define PCI_PMCS_PWR_STATE_D1 0x0001
-#define PCI_PMCS_PWR_STATE_D2 0x0002
-#define PCI_PMCS_PWR_STATE_D3 0x0003
-#define PCI_PM_BRIDGE_EXT 0x06 /* 8 bit */
-#define PCI_PM_DATA 0x07 /* 8 bit */
-
-#define CB_PRIMARY_BUS 0x18 /* 8 bit */
-#define CB_CARDBUS_BUS 0x19 /* 8 bit */
-#define CB_SUBORD_BUS 0x1a /* 8 bit */
-#define CB_LATENCY_TIMER 0x1b /* 8 bit */
-
-#define CB_MEM_BASE(m) (0x1c + 8*(m))
-#define CB_MEM_LIMIT(m) (0x20 + 8*(m))
-#define CB_IO_BASE(m) (0x2c + 8*(m))
-#define CB_IO_LIMIT(m) (0x30 + 8*(m))
-
-#define CB_BRIDGE_CONTROL 0x3e /* 16 bit */
-#define CB_BCR_PARITY_ENA 0x0001
-#define CB_BCR_SERR_ENA 0x0002
-#define CB_BCR_ISA_ENA 0x0004
-#define CB_BCR_VGA_ENA 0x0008
-#define CB_BCR_MABORT 0x0020
-#define CB_BCR_CB_RESET 0x0040
-#define CB_BCR_ISA_IRQ 0x0080
-#define CB_BCR_PREFETCH(m) (0x0100 << (m))
-#define CB_BCR_WRITE_POST 0x0400
-
-#define CB_LEGACY_MODE_BASE 0x44
-
-/* Memory mapped registers */
-
-#define CB_SOCKET_EVENT 0x0000
-#define CB_SE_CSTSCHG 0x00000001
-#define CB_SE_CCD 0x00000006
-#define CB_SE_CCD1 0x00000002
-#define CB_SE_CCD2 0x00000004
-#define CB_SE_PWRCYCLE 0x00000008
-
-#define CB_SOCKET_MASK 0x0004
-#define CB_SM_CSTSCHG 0x00000001
-#define CB_SM_CCD 0x00000006
-#define CB_SM_PWRCYCLE 0x00000008
-
-#define CB_SOCKET_STATE 0x0008
-#define CB_SS_CSTSCHG 0x00000001
-#define CB_SS_CCD 0x00000006
-#define CB_SS_CCD1 0x00000002
-#define CB_SS_CCD2 0x00000004
-#define CB_SS_PWRCYCLE 0x00000008
-#define CB_SS_16BIT 0x00000010
-#define CB_SS_32BIT 0x00000020
-#define CB_SS_CINT 0x00000040
-#define CB_SS_BADCARD 0x00000080
-#define CB_SS_DATALOST 0x00000100
-#define CB_SS_BADVCC 0x00000200
-#define CB_SS_5VCARD 0x00000400
-#define CB_SS_3VCARD 0x00000800
-#define CB_SS_XVCARD 0x00001000
-#define CB_SS_YVCARD 0x00002000
-#define CB_SS_VSENSE 0x00003c86
-#define CB_SS_5VSOCKET 0x10000000
-#define CB_SS_3VSOCKET 0x20000000
-#define CB_SS_XVSOCKET 0x40000000
-#define CB_SS_YVSOCKET 0x80000000
-
-#define CB_SOCKET_FORCE 0x000c
-#define CB_SF_CVSTEST 0x00004000
-
-#define CB_SOCKET_CONTROL 0x0010
-#define CB_SC_VPP_MASK 0x00000007
-#define CB_SC_VPP_OFF 0x00000000
-#define CB_SC_VPP_12V 0x00000001
-#define CB_SC_VPP_5V 0x00000002
-#define CB_SC_VPP_3V 0x00000003
-#define CB_SC_VPP_XV 0x00000004
-#define CB_SC_VPP_YV 0x00000005
-#define CB_SC_VCC_MASK 0x00000070
-#define CB_SC_VCC_OFF 0x00000000
-#define CB_SC_VCC_5V 0x00000020
-#define CB_SC_VCC_3V 0x00000030
-#define CB_SC_VCC_XV 0x00000040
-#define CB_SC_VCC_YV 0x00000050
-#define CB_SC_CCLK_STOP 0x00000080
-
-#define CB_SOCKET_POWER 0x0020
-#define CB_SP_CLK_CTRL 0x00000001
-#define CB_SP_CLK_CTRL_ENA 0x00010000
-#define CB_SP_CLK_MODE 0x01000000
-#define CB_SP_ACCESS 0x02000000
-
-/* Address bits 31..24 for memory windows for 16-bit cards,
- accessable only by memory mapping the 16-bit register set */
-#define CB_MEM_PAGE(map) (0x40 + (map))
-
-#endif /* _LINUX_YENTA_H */
CONFIG_DRIVER_EP93XX_MAC
CONFIG_DRIVER_NE2000
CONFIG_DRIVER_NE2000_BASE
-CONFIG_DRIVER_NE2000_CCR
-CONFIG_DRIVER_NE2000_VAL
CONFIG_DRIVER_SMC911X_BASE
CONFIG_DRIVER_TI_EMAC_USE_RMII
CONFIG_DSP_CLUSTER_START
CONFIG_PCI_SYS_BUS
CONFIG_PCI_SYS_PHYS
CONFIG_PCI_SYS_SIZE
-CONFIG_PCMCIA
-CONFIG_PCMCIA_SLOT_A
-CONFIG_PCMCIA_SLOT_B
CONFIG_PCNET
CONFIG_PCNET_79C973
CONFIG_PCNET_79C975
CONFIG_SYS_PCI_TBATR4
CONFIG_SYS_PCI_TBATR5
CONFIG_SYS_PCI_VIRT
-CONFIG_SYS_PCMCIA_MEM_SIZE
CONFIG_SYS_PDCNT
CONFIG_SYS_PEHLPAR
CONFIG_SYS_PEPAR