dm: test: clk: Add test for ccf clk_set_rate()

Add a simple test case which sets clock rate to its current value.

Signed-off-by: Igor Prusov <ivprusov@salutedevices.com>
Reviewed-by: Sean Anderson <seanga2@gmail.com>
Link: https://lore.kernel.org/r/20231205232334.2931-3-ivprusov@salutedevices.com

diff --git a/test/dm/clk_ccf.c b/test/dm/clk_ccf.c
index e4ebb93cdad4bda820a9cf18a6991bd88b4e1617..3b2398254147065e7dc90e33aaa9ef6291443f6e 100644 (file)
--- a/test/dm/clk_ccf.c
+++ b/test/dm/clk_ccf.c
@@ -63,6 +63,9 @@ static int dm_test_clk_ccf(struct unit_test_state *uts)
        rate = clk_get_parent_rate(clk);
        ut_asserteq(rate, 60000000);
 
+       rate = clk_set_rate(clk, 60000000);
+       ut_asserteq(rate, -ENOSYS);
+
        rate = clk_get_rate(clk);
        ut_asserteq(rate, 60000000);
 
@@ -87,6 +90,9 @@ static int dm_test_clk_ccf(struct unit_test_state *uts)
        ut_asserteq_str("pll3_80m", pclk->dev->name);
        ut_asserteq(CLK_SET_RATE_PARENT, pclk->flags);
 
+       rate = clk_set_rate(clk, 80000000);
+       ut_asserteq(rate, -ENOSYS);
+
        rate = clk_get_rate(clk);
        ut_asserteq(rate, 80000000);
 
@@ -108,6 +114,9 @@ static int dm_test_clk_ccf(struct unit_test_state *uts)
        rate = clk_get_rate(clk);
        ut_asserteq(rate, 60000000);
 
+       rate = clk_set_rate(clk, 60000000);
+       ut_asserteq(rate, 60000000);
+
 #if CONFIG_IS_ENABLED(CLK_CCF)
        /* Test clk tree enable/disable */
        ret = clk_get_by_id(SANDBOX_CLK_I2C_ROOT, &clk);