fsl/usb: Move USB internal phy definitions to fsl_usb.h

fsl_usb.h file created to share data bewteen usb platform code
and usb ip driver. Internal phy structure definitions moved to
this file

Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/cpu_init.c b/arch/powerpc/cpu/mpc85xx/cpu_init.c
index 48b38263fde213424eab2b2dcfe062a15bbb3fc8..2d65157c7fd03d5e5c93dedf0a1aa267c6374d58 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu_init.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu_init.c
@@ -22,6 +22,7 @@
 #include <asm/fsl_law.h>
 #include <asm/fsl_serdes.h>
 #include <asm/fsl_srio.h>
+#include <fsl_usb.h>
 #include <hwconfig.h>
 #include <linux/compiler.h>
 #include "mp.h"
@@ -605,7 +606,7 @@ skip_l2:
 
 #ifdef CONFIG_SYS_FSL_USB1_PHY_ENABLE
        {
-               ccsr_usb_phy_t *usb_phy1 =
+               struct ccsr_usb_phy __iomem *usb_phy1 =
                        (void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;
                out_be32(&usb_phy1->usb_enable_override,
                                CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE);
@@ -613,7 +614,7 @@ skip_l2:
 #endif
 #ifdef CONFIG_SYS_FSL_USB2_PHY_ENABLE
        {
-               ccsr_usb_phy_t *usb_phy2 =
+               struct ccsr_usb_phy __iomem *usb_phy2 =
                        (void *)CONFIG_SYS_MPC85xx_USB2_PHY_ADDR;
                out_be32(&usb_phy2->usb_enable_override,
                                CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE);
@@ -635,7 +636,7 @@ skip_l2:
 #endif
 
 #if defined(CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE)
-               ccsr_usb_phy_t *usb_phy =
+               struct ccsr_usb_phy __iomem *usb_phy =
                        (void *)CONFIG_SYS_MPC85xx_USB1_PHY_ADDR;
                setbits_be32(&usb_phy->pllprg[1],
                             CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN |

diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 2ed384e302a2e6af5b85a78ab3c9888736797bb0..3a10d778f1ba01d17271dad9ebb09aef82908fe4 100644 (file)
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2846,54 +2846,6 @@ typedef struct ccsr_pme {
        u8      res4[0x400];
 } ccsr_pme_t;
 
-#ifdef CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
-struct ccsr_usb_port_ctrl {
-       u32     ctrl;
-       u32     drvvbuscfg;
-       u32     pwrfltcfg;
-       u32     sts;
-       u8      res_14[0xc];
-       u32     bistcfg;
-       u32     biststs;
-       u32     abistcfg;
-       u32     abiststs;
-       u8      res_30[0x10];
-       u32     xcvrprg;
-       u32     anaprg;
-       u32     anadrv;
-       u32     anasts;
-};
-
-typedef struct ccsr_usb_phy {
-       u32     id;
-       struct  ccsr_usb_port_ctrl port1;
-       u8      res_50[0xc];
-       u32     tvr;
-       u32     pllprg[4];
-       u8      res_70[0x4];
-       u32     anaccfg;
-       u32     dbg;
-       u8      res_7c[0x4];
-       struct  ccsr_usb_port_ctrl port2;
-       u8      res_dc[0x334];
-} ccsr_usb_phy_t;
-
-#define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0)
-#define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1)
-#define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16)
-#define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21)
-#else
-typedef struct ccsr_usb_phy {
-       u8      res0[0x18];
-       u32     usb_enable_override;
-       u8      res[0xe4];
-} ccsr_usb_phy_t;
-#define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1
-#endif
-
 #ifdef CONFIG_SYS_FSL_RAID_ENGINE
 struct ccsr_raide {
        u8      res0[0x543];

diff --git a/include/fsl_usb.h b/include/fsl_usb.h
new file mode 100644 (file)
index 0000000..88d6a1f
--- /dev/null
+++ b/include/fsl_usb.h
@@ -0,0 +1,80 @@
+/*
+ * Freescale USB Controller
+ *
+ * Copyright 2013 Freescale Semiconductor, Inc.
+ *
+ * This software may be used and distributed according to the
+ * terms of the GNU Public License, Version 2, incorporated
+ * herein by reference.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_FSL_USB_H_
+#define _ASM_FSL_USB_H_
+
+#ifdef CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
+struct ccsr_usb_port_ctrl {
+       u32     ctrl;
+       u32     drvvbuscfg;
+       u32     pwrfltcfg;
+       u32     sts;
+       u8      res_14[0xc];
+       u32     bistcfg;
+       u32     biststs;
+       u32     abistcfg;
+       u32     abiststs;
+       u8      res_30[0x10];
+       u32     xcvrprg;
+       u32     anaprg;
+       u32     anadrv;
+       u32     anasts;
+};
+
+struct ccsr_usb_phy {
+       u32     id;
+       struct ccsr_usb_port_ctrl port1;
+       u8      res_50[0xc];
+       u32     tvr;
+       u32     pllprg[4];
+       u8      res_70[0x4];
+       u32     anaccfg;
+       u32     dbg;
+       u8      res_7c[0x4];
+       struct ccsr_usb_port_ctrl port2;
+       u8      res_dc[0x334];
+};
+
+#define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0)
+#define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1)
+#define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1)
+#define CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV (1 << 0)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN (1 << 13)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV (1 << 4)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16)
+#define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21)
+#define CONFIG_SYS_FSL_USB_SYS_CLK_VALID (1 << 0)
+#else
+struct ccsr_usb_phy {
+       u8      res0[0x18];
+       u32     usb_enable_override;
+       u8      res[0xe4];
+};
+#define        CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE      1
+#endif
+
+#endif /*_ASM_FSL_USB_H_ */