ARM: zynq: Sync Microzed board with Linux kernel

Fix model name, node locations and also add pinctrl description for usb.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/3295fde73db13a712b65f4967eb5f39ced895ad4.1679988091.git.michal.simek@amd.com

diff --git a/arch/arm/dts/zynq-microzed.dts b/arch/arm/dts/zynq-microzed.dts
index b95eb3ed2434cf1a1d17f5c846c367d4c56a1f94..5f280f4d8ece8ff21bc6faa9ffa169a02e5b006b 100644 (file)
--- a/arch/arm/dts/zynq-microzed.dts
+++ b/arch/arm/dts/zynq-microzed.dts
@@ -8,7 +8,7 @@
 #include "zynq-7000.dtsi"
 
 / {
-       model = "Zynq MicroZED Board";
+       model = "Avnet MicroZed board";
        compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
 
        aliases {
@@ -19,7 +19,7 @@
 
        memory@0 {
                device_type = "memory";
-               reg = <0 0x40000000>;
+               reg = <0x0 0x40000000>;
        };
 
        chosen {
@@ -42,11 +42,6 @@
        status = "okay";
 };
 
-&uart1 {
-       bootph-all;
-       status = "okay";
-};
-
 &gem0 {
        status = "okay";
        phy-mode = "rgmii-id";
@@ -62,8 +57,41 @@
        status = "okay";
 };
 
+&uart1 {
+       bootph-all;
+       status = "okay";
+};
+
 &usb0 {
        status = "okay";
        dr_mode = "host";
        usb-phy = <&usb_phy0>;
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_usb0_default>;
+};
+
+&pinctrl0 {
+       pinctrl_usb0_default: usb0-default {
+               mux {
+                       groups = "usb0_0_grp";
+                       function = "usb0";
+               };
+
+               conf {
+                       groups = "usb0_0_grp";
+                       slew-rate = <0>;
+                       io-standard = <1>;
+               };
+
+               conf-rx {
+                       pins = "MIO29", "MIO31", "MIO36";
+                       bias-high-impedance;
+               };
+
+               conf-tx {
+                       pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
+                              "MIO35", "MIO37", "MIO38", "MIO39";
+                       bias-disable;
+               };
+       };
 };