sbc8548: enable access to second bank of flash

The sbc8548 has a 64MB SODIMM flash module off of CS6 that
previously wasn't enumerated by u-boot.  There were already
BR6/OR6 settings for it [used by cpu_init_f()] but there
was no TLB entry and it wasn't in the list of flash banks
reported to u-boot.

The location of the 64MB flash is "pulled back" 8MB from
a 64MB boundary, in order to allow address space for the
8MB boot flash that is at the end of 32 bit address space.
This means creating two 4MB TLB entries for the 8MB chunk,
and then expanding the original boot flash entry to 64MB
in order to cover the 8MB boot flash and the remainder
(56MB) of the user flash.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

diff --git a/board/sbc8548/tlb.c b/board/sbc8548/tlb.c
index ddcb532eefd2f3dc5e236b99eb80e2904db540ed..a0b4e36e7b030fb47943ce40ff93ea42bce3b002 100644 (file)
--- a/board/sbc8548/tlb.c
+++ b/board/sbc8548/tlb.c
@@ -45,13 +45,15 @@ struct fsl_e_tlb_entry tlb_table[] = {
                      0, 0, BOOKE_PAGESZ_4K, 0),
 
        /*
-        * TLB 0:       16M     Non-cacheable, guarded
-        * 0xff800000   16M     TLB for 8MB FLASH
+        * TLB 0:       64M     Non-cacheable, guarded
+        * 0xfc000000   56M     8MB -> 64MB of user flash
+        * 0xff800000   8M      boot FLASH
         * Out of reset this entry is only 4K.
         */
-       SET_TLB_ENTRY(1, CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE,
+       SET_TLB_ENTRY(1, CONFIG_SYS_ALT_FLASH + 0x800000,
+                     CONFIG_SYS_ALT_FLASH + 0x800000,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
-                     0, 0, BOOKE_PAGESZ_16M, 1),
+                     0, 0, BOOKE_PAGESZ_64M, 1),
 
        /*
         * TLB 1:       256M    Non-cacheable, guarded
@@ -107,6 +109,24 @@ struct fsl_e_tlb_entry tlb_table[] = {
        SET_TLB_ENTRY(1, CONFIG_SYS_EPLD_BASE, CONFIG_SYS_EPLD_BASE,
                      MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
                      0, 6, BOOKE_PAGESZ_16M, 1),
+
+       /*
+        * TLB 7:       4M      Non-cacheable, guarded
+        * 0xfb800000   4M      1st 4MB block of 64MB user FLASH
+        */
+       SET_TLB_ENTRY(1, CONFIG_SYS_ALT_FLASH, CONFIG_SYS_ALT_FLASH,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 7, BOOKE_PAGESZ_4M, 1),
+
+       /*
+        * TLB 8:       4M      Non-cacheable, guarded
+        * 0xfbc00000   4M      2nd 4MB block of 64MB user FLASH
+        */
+       SET_TLB_ENTRY(1, CONFIG_SYS_ALT_FLASH + 0x400000,
+                     CONFIG_SYS_ALT_FLASH + 0x400000,
+                     MAS3_SX|MAS3_SW|MAS3_SR, MAS2_I|MAS2_G,
+                     0, 8, BOOKE_PAGESZ_4M, 1),
+
 };
 
 int num_tlb_entries = ARRAY_SIZE(tlb_table);

diff --git a/include/configs/sbc8548.h b/include/configs/sbc8548.h
index 3d05afbba16b79fd783abe7557cc1e4ea08b4005..5c1411f6689ee54137267e37e1d644afe6ce8f9b 100644 (file)
--- a/include/configs/sbc8548.h
+++ b/include/configs/sbc8548.h
@@ -163,6 +163,7 @@
  */
 
 #define CONFIG_SYS_BOOT_BLOCK          0xff800000      /* start of 8MB Flash */
+#define CONFIG_SYS_ALT_FLASH           0xfb800000      /* 64MB "user" flash */
 #define CONFIG_SYS_FLASH_BASE          CONFIG_SYS_BOOT_BLOCK   /* start of FLASH 16M */
 
 #define CONFIG_SYS_BR0_PRELIM          0xff800801
@@ -171,9 +172,10 @@
 #define        CONFIG_SYS_OR0_PRELIM           0xff806e65
 #define        CONFIG_SYS_OR6_PRELIM           0xf8006e65
 
-#define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE}
-#define CONFIG_SYS_MAX_FLASH_BANKS     1               /* number of banks */
-#define CONFIG_SYS_MAX_FLASH_SECT      128             /* sectors per device */
+#define CONFIG_SYS_FLASH_BANKS_LIST    {CONFIG_SYS_FLASH_BASE, \
+                                        CONFIG_SYS_ALT_FLASH}
+#define CONFIG_SYS_MAX_FLASH_BANKS     2               /* number of banks */
+#define CONFIG_SYS_MAX_FLASH_SECT      256             /* sectors per device */
 #undef CONFIG_SYS_FLASH_CHECKSUM
 #define CONFIG_SYS_FLASH_ERASE_TOUT    60000   /* Flash Erase Timeout (ms) */
 #define CONFIG_SYS_FLASH_WRITE_TOUT    500     /* Flash Write Timeout (ms) */