powerpc: Fix CamelCase checkpatch warnings

85xx, 86xx PowerPC folders have code variables with CamelCase naming conventions.
because of this code checkpatch script generates "WARNING: Avoid CamelCase".

Convert variables name to normal naming convention and modify board, driver
files with updated the new structure.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Acked-by: York Sun <yorksun@freescale.com>

diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c
index 66bc6a2ea362725f25a9bdedc131a7a98fec1dc8..b77964a4c795a6f9f6e17e750843b5492be08f4e 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/cpu.c
+++ b/arch/powerpc/cpu/mpc85xx/cpu.c
@@ -135,78 +135,79 @@ int checkcpu (void)
                if (!(i & 3))
                        printf ("\n       ");
                printf("CPU%d:%-4s MHz, ", core,
-                       strmhz(buf1, sysinfo.freqProcessor[core]));
+                       strmhz(buf1, sysinfo.freq_processor[core]));
        }
-       printf("\n       CCB:%-4s MHz,\n", strmhz(buf1, sysinfo.freqSystemBus));
+       printf("\n       CCB:%-4s MHz,", strmhz(buf1, sysinfo.freq_systembus));
+       printf("\n");
 
 #ifdef CONFIG_FSL_CORENET
        if (ddr_sync == 1) {
                printf("       DDR:%-4s MHz (%s MT/s data rate) "
                        "(Synchronous), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
        } else {
                printf("       DDR:%-4s MHz (%s MT/s data rate) "
                        "(Asynchronous), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
        }
 #else
        switch (ddr_ratio) {
        case 0x0:
                printf("       DDR:%-4s MHz (%s MT/s data rate), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
                break;
        case 0x7:
                printf("       DDR:%-4s MHz (%s MT/s data rate) "
                        "(Synchronous), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
                break;
        default:
                printf("       DDR:%-4s MHz (%s MT/s data rate) "
                        "(Asynchronous), ",
-                       strmhz(buf1, sysinfo.freqDDRBus/2),
-                       strmhz(buf2, sysinfo.freqDDRBus));
+                       strmhz(buf1, sysinfo.freq_ddrbus/2),
+                       strmhz(buf2, sysinfo.freq_ddrbus));
                break;
        }
 #endif
 
 #if defined(CONFIG_FSL_LBC)
-       if (sysinfo.freqLocalBus > LCRR_CLKDIV) {
-               printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
+       if (sysinfo.freq_localbus > LCRR_CLKDIV) {
+               printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
        } else {
                printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
-                      sysinfo.freqLocalBus);
+                      sysinfo.freq_localbus);
        }
 #endif
 
 #if defined(CONFIG_FSL_IFC)
-       printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
+       printf("IFC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
 #endif
 
 #ifdef CONFIG_CPM2
-       printf("CPM:   %s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
+       printf("CPM:   %s MHz\n", strmhz(buf1, sysinfo.freq_systembus));
 #endif
 
 #ifdef CONFIG_QE
-       printf("       QE:%-4s MHz\n", strmhz(buf1, sysinfo.freqQE));
+       printf("       QE:%-4s MHz\n", strmhz(buf1, sysinfo.freq_qe));
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
        for (i = 0; i < CONFIG_SYS_NUM_FMAN; i++) {
                printf("       FMAN%d: %s MHz\n", i + 1,
-                       strmhz(buf1, sysinfo.freqFMan[i]));
+                       strmhz(buf1, sysinfo.freq_fman[i]));
        }
 #endif
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
-       printf("       QMAN:  %s MHz\n", strmhz(buf1, sysinfo.freqQMAN));
+       printf("       QMAN:  %s MHz\n", strmhz(buf1, sysinfo.freq_qman));
 #endif
 
 #ifdef CONFIG_SYS_DPAA_PME
-       printf("       PME:   %s MHz\n", strmhz(buf1, sysinfo.freqPME));
+       printf("       PME:   %s MHz\n", strmhz(buf1, sysinfo.freq_pme));
 #endif
 
        puts("L1:    D-cache 32 kB enabled\n       I-cache 32 kB enabled\n");

diff --git a/arch/powerpc/cpu/mpc85xx/fdt.c b/arch/powerpc/cpu/mpc85xx/fdt.c
index 84bb8fab8fe7f9ce7fe651c04a79092fdeb61612..63a04f14fa9347e0434055b72a1431210a8ba86a 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/fdt.c
+++ b/arch/powerpc/cpu/mpc85xx/fdt.c
@@ -403,22 +403,22 @@ static void ft_fixup_dpaa_clks(void *blob)
        get_sys_info(&sysinfo);
 #ifdef CONFIG_SYS_DPAA_FMAN
        ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM1_OFFSET,
-                       sysinfo.freqFMan[0]);
+                       sysinfo.freq_fman[0]);
 
 #if (CONFIG_SYS_NUM_FMAN == 2)
        ft_fixup_clks(blob, "fsl,fman", CONFIG_SYS_FSL_FM2_OFFSET,
-                       sysinfo.freqFMan[1]);
+                       sysinfo.freq_fman[1]);
 #endif
 #endif
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
        do_fixup_by_compat_u32(blob, "fsl,qman",
-                       "clock-frequency", sysinfo.freqQMAN, 1);
+                       "clock-frequency", sysinfo.freq_qman, 1);
 #endif
 
 #ifdef CONFIG_SYS_DPAA_PME
        do_fixup_by_compat_u32(blob, "fsl,pme",
-               "clock-frequency", sysinfo.freqPME, 1);
+               "clock-frequency", sysinfo.freq_pme, 1);
 #endif
 }
 #else
@@ -616,7 +616,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
        off = fdt_node_offset_by_prop_value(blob, -1, "device_type", "cpu", 4);
        while (off != -FDT_ERR_NOTFOUND) {
                u32 *reg = (u32 *)fdt_getprop(blob, off, "reg", 0);
-               val = cpu_to_fdt32(sysinfo.freqProcessor[*reg]);
+               val = cpu_to_fdt32(sysinfo.freq_processor[*reg]);
                fdt_setprop(blob, off, "clock-frequency", &val, 4);
                off = fdt_node_offset_by_prop_value(blob, off, "device_type",
                                                        "cpu", 4);

diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c
index f093960fe7e7139cfec9e164f8ff9a5b97a25aaa..07690f97b16a9ca9e2095233b65f60c4c23ff364 100644 (file)
--- a/arch/powerpc/cpu/mpc85xx/speed.c
+++ b/arch/powerpc/cpu/mpc85xx/speed.c
@@ -20,7 +20,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 /* --------------------------------------------------------------- */
 
-void get_sys_info (sys_info_t * sysInfo)
+void get_sys_info(sys_info_t *sys_info)
 {
        volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
 #ifdef CONFIG_FSL_IFC
@@ -46,7 +46,7 @@ void get_sys_info (sys_info_t * sysInfo)
                [14] = 3,       /* CC4 PPL / 4 */
        };
 
-       const u8 core_cplx_PLL_div[16] = {
+       const u8 core_cplx_pll_div[16] = {
                [ 0] = 1,       /* CC1 PPL / 1 */
                [ 1] = 2,       /* CC1 PPL / 2 */
                [ 2] = 4,       /* CC1 PPL / 4 */
@@ -60,26 +60,26 @@ void get_sys_info (sys_info_t * sysInfo)
                [13] = 2,       /* CC4 PPL / 2 */
                [14] = 4,       /* CC4 PPL / 4 */
        };
-       uint i, freqCC_PLL[6], rcw_tmp;
+       uint i, freq_cc_pll[6], rcw_tmp;
        uint ratio[6];
        unsigned long sysclk = CONFIG_SYS_CLK_FREQ;
        uint mem_pll_rat;
 
-       sysInfo->freqSystemBus = sysclk;
+       sys_info->freq_systembus = sysclk;
 #ifdef CONFIG_DDR_CLK_FREQ
-       sysInfo->freqDDRBus = CONFIG_DDR_CLK_FREQ;
+       sys_info->freq_ddrbus = CONFIG_DDR_CLK_FREQ;
 #else
-       sysInfo->freqDDRBus = sysclk;
+       sys_info->freq_ddrbus = sysclk;
 #endif
 
-       sysInfo->freqSystemBus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
+       sys_info->freq_systembus *= (in_be32(&gur->rcwsr[0]) >> 25) & 0x1f;
        mem_pll_rat = (in_be32(&gur->rcwsr[0]) >>
                        FSL_CORENET_RCWSR0_MEM_PLL_RAT_SHIFT)
                        & FSL_CORENET_RCWSR0_MEM_PLL_RAT_MASK;
        if (mem_pll_rat > 2)
-               sysInfo->freqDDRBus *= mem_pll_rat;
+               sys_info->freq_ddrbus *= mem_pll_rat;
        else
-               sysInfo->freqDDRBus = sysInfo->freqSystemBus * mem_pll_rat;
+               sys_info->freq_ddrbus = sys_info->freq_systembus * mem_pll_rat;
 
        ratio[0] = (in_be32(&clk->pllc1gsr) >> 1) & 0x3f;
        ratio[1] = (in_be32(&clk->pllc2gsr) >> 1) & 0x3f;
@@ -89,9 +89,9 @@ void get_sys_info (sys_info_t * sysInfo)
        ratio[5] = (in_be32(&clk->pllc6gsr) >> 1) & 0x3f;
        for (i = 0; i < 6; i++) {
                if (ratio[i] > 4)
-                       freqCC_PLL[i] = sysclk * ratio[i];
+                       freq_cc_pll[i] = sysclk * ratio[i];
                else
-                       freqCC_PLL[i] = sysInfo->freqSystemBus * ratio[i];
+                       freq_cc_pll[i] = sys_info->freq_systembus * ratio[i];
        }
 #ifdef CONFIG_SYS_FSL_QORIQ_CHASSIS2
        /*
@@ -110,8 +110,8 @@ void get_sys_info (sys_info_t * sysInfo)
                        printf("Unsupported architecture configuration"
                                " in function %s\n", __func__);
                cplx_pll += (cluster / 2) * 3;
-               sysInfo->freqProcessor[cpu] =
-                        freqCC_PLL[cplx_pll] / core_cplx_PLL_div[c_pll_sel];
+               sys_info->freq_processor[cpu] =
+                        freq_cc_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
        }
 #ifdef CONFIG_PPC_B4860
 #define FM1_CLK_SEL    0xe0000000
@@ -127,63 +127,63 @@ void get_sys_info (sys_info_t * sysInfo)
 #ifdef CONFIG_SYS_DPAA_PME
        switch ((rcw_tmp & PME_CLK_SEL) >> PME_CLK_SHIFT) {
        case 1:
-               sysInfo->freqPME = freqCC_PLL[0];
+               sys_info->freq_pme = freq_cc_pll[0];
                break;
        case 2:
-               sysInfo->freqPME = freqCC_PLL[0] / 2;
+               sys_info->freq_pme = freq_cc_pll[0] / 2;
                break;
        case 3:
-               sysInfo->freqPME = freqCC_PLL[0] / 3;
+               sys_info->freq_pme = freq_cc_pll[0] / 3;
                break;
        case 4:
-               sysInfo->freqPME = freqCC_PLL[0] / 4;
+               sys_info->freq_pme = freq_cc_pll[0] / 4;
                break;
        case 6:
-               sysInfo->freqPME = freqCC_PLL[1] / 2;
+               sys_info->freq_pme = freq_cc_pll[1] / 2;
                break;
        case 7:
-               sysInfo->freqPME = freqCC_PLL[1] / 3;
+               sys_info->freq_pme = freq_cc_pll[1] / 3;
                break;
        default:
                printf("Error: Unknown PME clock select!\n");
        case 0:
-               sysInfo->freqPME = sysInfo->freqSystemBus / 2;
+               sys_info->freq_pme = sys_info->freq_systembus / 2;
                break;
 
        }
 #endif
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
-       sysInfo->freqQMAN = sysInfo->freqSystemBus / 2;
+       sys_info->freq_qman = sys_info->freq_systembus / 2;
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
        switch ((rcw_tmp & FM1_CLK_SEL) >> FM1_CLK_SHIFT) {
        case 1:
-               sysInfo->freqFMan[0] = freqCC_PLL[3];
+               sys_info->freq_fman[0] = freq_cc_pll[3];
                break;
        case 2:
-               sysInfo->freqFMan[0] = freqCC_PLL[3] / 2;
+               sys_info->freq_fman[0] = freq_cc_pll[3] / 2;
                break;
        case 3:
-               sysInfo->freqFMan[0] = freqCC_PLL[3] / 3;
+               sys_info->freq_fman[0] = freq_cc_pll[3] / 3;
                break;
        case 4:
-               sysInfo->freqFMan[0] = freqCC_PLL[3] / 4;
+               sys_info->freq_fman[0] = freq_cc_pll[3] / 4;
                break;
        case 5:
-               sysInfo->freqFMan[0] = sysInfo->freqSystemBus;
+               sys_info->freq_fman[0] = sys_info->freq_systembus;
                break;
        case 6:
-               sysInfo->freqFMan[0] = freqCC_PLL[4] / 2;
+               sys_info->freq_fman[0] = freq_cc_pll[4] / 2;
                break;
        case 7:
-               sysInfo->freqFMan[0] = freqCC_PLL[4] / 3;
+               sys_info->freq_fman[0] = freq_cc_pll[4] / 3;
                break;
        default:
                printf("Error: Unknown FMan1 clock select!\n");
        case 0:
-               sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2;
+               sys_info->freq_fman[0] = sys_info->freq_systembus / 2;
                break;
        }
 #if (CONFIG_SYS_NUM_FMAN) == 2
@@ -192,27 +192,27 @@ void get_sys_info (sys_info_t * sysInfo)
        rcw_tmp = in_be32(&gur->rcwsr[15]);
        switch ((rcw_tmp & FM2_CLK_SEL) >> FM2_CLK_SHIFT) {
        case 1:
-               sysInfo->freqFMan[1] = freqCC_PLL[4];
+               sys_info->freq_fman[1] = freq_cc_pll[4];
                break;
        case 2:
-               sysInfo->freqFMan[1] = freqCC_PLL[4] / 2;
+               sys_info->freq_fman[1] = freq_cc_pll[4] / 2;
                break;
        case 3:
-               sysInfo->freqFMan[1] = freqCC_PLL[4] / 3;
+               sys_info->freq_fman[1] = freq_cc_pll[4] / 3;
                break;
        case 4:
-               sysInfo->freqFMan[1] = freqCC_PLL[4] / 4;
+               sys_info->freq_fman[1] = freq_cc_pll[4] / 4;
                break;
        case 6:
-               sysInfo->freqFMan[1] = freqCC_PLL[3] / 2;
+               sys_info->freq_fman[1] = freq_cc_pll[3] / 2;
                break;
        case 7:
-               sysInfo->freqFMan[1] = freqCC_PLL[3] / 3;
+               sys_info->freq_fman[1] = freq_cc_pll[3] / 3;
                break;
        default:
                printf("Error: Unknown FMan2 clock select!\n");
        case 0:
-               sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2;
+               sys_info->freq_fman[1] = sys_info->freq_systembus / 2;
                break;
        }
 #endif /* CONFIG_SYS_NUM_FMAN == 2 */
@@ -225,8 +225,8 @@ void get_sys_info (sys_info_t * sysInfo)
                                & 0xf;
                u32 cplx_pll = core_cplx_PLL[c_pll_sel];
 
-               sysInfo->freqProcessor[cpu] =
-                        freqCC_PLL[cplx_pll] / core_cplx_PLL_div[c_pll_sel];
+               sys_info->freq_processor[cpu] =
+                        freq_cc_pll[cplx_pll] / core_cplx_pll_div[c_pll_sel];
        }
 #define PME_CLK_SEL    0x80000000
 #define FM1_CLK_SEL    0x40000000
@@ -246,43 +246,43 @@ void get_sys_info (sys_info_t * sysInfo)
 #ifdef CONFIG_SYS_DPAA_PME
        if (rcw_tmp & PME_CLK_SEL) {
                if (rcw_tmp & HWA_ASYNC_DIV)
-                       sysInfo->freqPME = freqCC_PLL[HWA_CC_PLL] / 4;
+                       sys_info->freq_pme = freq_cc_pll[HWA_CC_PLL] / 4;
                else
-                       sysInfo->freqPME = freqCC_PLL[HWA_CC_PLL] / 2;
+                       sys_info->freq_pme = freq_cc_pll[HWA_CC_PLL] / 2;
        } else {
-               sysInfo->freqPME = sysInfo->freqSystemBus / 2;
+               sys_info->freq_pme = sys_info->freq_systembus / 2;
        }
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
        if (rcw_tmp & FM1_CLK_SEL) {
                if (rcw_tmp & HWA_ASYNC_DIV)
-                       sysInfo->freqFMan[0] = freqCC_PLL[HWA_CC_PLL] / 4;
+                       sys_info->freq_fman[0] = freq_cc_pll[HWA_CC_PLL] / 4;
                else
-                       sysInfo->freqFMan[0] = freqCC_PLL[HWA_CC_PLL] / 2;
+                       sys_info->freq_fman[0] = freq_cc_pll[HWA_CC_PLL] / 2;
        } else {
-               sysInfo->freqFMan[0] = sysInfo->freqSystemBus / 2;
+               sys_info->freq_fman[0] = sys_info->freq_systembus / 2;
        }
 #if (CONFIG_SYS_NUM_FMAN) == 2
        if (rcw_tmp & FM2_CLK_SEL) {
                if (rcw_tmp & HWA_ASYNC_DIV)
-                       sysInfo->freqFMan[1] = freqCC_PLL[HWA_CC_PLL] / 4;
+                       sys_info->freq_fman[1] = freq_cc_pll[HWA_CC_PLL] / 4;
                else
-                       sysInfo->freqFMan[1] = freqCC_PLL[HWA_CC_PLL] / 2;
+                       sys_info->freq_fman[1] = freq_cc_pll[HWA_CC_PLL] / 2;
        } else {
-               sysInfo->freqFMan[1] = sysInfo->freqSystemBus / 2;
+               sys_info->freq_fman[1] = sys_info->freq_systembus / 2;
        }
 #endif
 #endif
 
 #ifdef CONFIG_SYS_DPAA_QBMAN
-       sysInfo->freqQMAN = sysInfo->freqSystemBus / 2;
+       sys_info->freq_qman = sys_info->freq_systembus / 2;
 #endif
 
 #endif /* CONFIG_SYS_FSL_QORIQ_CHASSIS2 */
 
 #else /* CONFIG_FSL_CORENET */
-       uint plat_ratio, e500_ratio, half_freqSystemBus;
+       uint plat_ratio, e500_ratio, half_freq_systembus;
        int i;
 #ifdef CONFIG_QE
        __maybe_unused u32 qe_ratio;
@@ -290,40 +290,40 @@ void get_sys_info (sys_info_t * sysInfo)
 
        plat_ratio = (gur->porpllsr) & 0x0000003e;
        plat_ratio >>= 1;
-       sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
+       sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ;
 
        /* Divide before multiply to avoid integer
         * overflow for processor speeds above 2GHz */
-       half_freqSystemBus = sysInfo->freqSystemBus/2;
+       half_freq_systembus = sys_info->freq_systembus/2;
        for (i = 0; i < cpu_numcores(); i++) {
                e500_ratio = ((gur->porpllsr) >> (i * 8 + 16)) & 0x3f;
-               sysInfo->freqProcessor[i] = e500_ratio * half_freqSystemBus;
+               sys_info->freq_processor[i] = e500_ratio * half_freq_systembus;
        }
 
-       /* Note: freqDDRBus is the MCLK frequency, not the data rate. */
-       sysInfo->freqDDRBus = sysInfo->freqSystemBus;
+       /* Note: freq_ddrbus is the MCLK frequency, not the data rate. */
+       sys_info->freq_ddrbus = sys_info->freq_systembus;
 
 #ifdef CONFIG_DDR_CLK_FREQ
        {
                u32 ddr_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_DDR_RATIO)
                        >> MPC85xx_PORPLLSR_DDR_RATIO_SHIFT;
                if (ddr_ratio != 0x7)
-                       sysInfo->freqDDRBus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
+                       sys_info->freq_ddrbus = ddr_ratio * CONFIG_DDR_CLK_FREQ;
        }
 #endif
 
 #ifdef CONFIG_QE
 #if defined(CONFIG_P1012) || defined(CONFIG_P1021) || defined(CONFIG_P1025)
-       sysInfo->freqQE =  sysInfo->freqSystemBus;
+       sys_info->freq_qe =  sys_info->freq_systembus;
 #else
        qe_ratio = ((gur->porpllsr) & MPC85xx_PORPLLSR_QE_RATIO)
                        >> MPC85xx_PORPLLSR_QE_RATIO_SHIFT;
-       sysInfo->freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ;
+       sys_info->freq_qe = qe_ratio * CONFIG_SYS_CLK_FREQ;
 #endif
 #endif
 
 #ifdef CONFIG_SYS_DPAA_FMAN
-               sysInfo->freqFMan[0] = sysInfo->freqSystemBus;
+               sys_info->freq_fman[0] = sys_info->freq_systembus;
 #endif
 
 #endif /* CONFIG_FSL_CORENET */
@@ -350,10 +350,10 @@ void get_sys_info (sys_info_t * sysInfo)
                 */
                lcrr_div *= 2;
 #endif
-               sysInfo->freqLocalBus = sysInfo->freqSystemBus / lcrr_div;
+               sys_info->freq_localbus = sys_info->freq_systembus / lcrr_div;
        } else {
                /* In case anyone cares what the unknown value is */
-               sysInfo->freqLocalBus = lcrr_div;
+               sys_info->freq_localbus = lcrr_div;
        }
 #endif
 
@@ -361,7 +361,7 @@ void get_sys_info (sys_info_t * sysInfo)
        ccr = in_be32(&ifc_regs->ifc_ccr);
        ccr = ((ccr & IFC_CCR_CLK_DIV_MASK) >> IFC_CCR_CLK_DIV_SHIFT) + 1;
 
-       sysInfo->freqLocalBus = sysInfo->freqSystemBus / ccr;
+       sys_info->freq_localbus = sys_info->freq_systembus / ccr;
 #endif
 }
 
@@ -382,13 +382,13 @@ int get_clocks (void)
        dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
 #endif
        get_sys_info (&sys_info);
-       gd->cpu_clk = sys_info.freqProcessor[0];
-       gd->bus_clk = sys_info.freqSystemBus;
-       gd->mem_clk = sys_info.freqDDRBus;
-       gd->arch.lbc_clk = sys_info.freqLocalBus;
+       gd->cpu_clk = sys_info.freq_processor[0];
+       gd->bus_clk = sys_info.freq_systembus;
+       gd->mem_clk = sys_info.freq_ddrbus;
+       gd->arch.lbc_clk = sys_info.freq_localbus;
 
 #ifdef CONFIG_QE
-       gd->arch.qe_clk = sys_info.freqQE;
+       gd->arch.qe_clk = sys_info.freq_qe;
        gd->arch.brg_clk = gd->arch.qe_clk / 2;
 #endif
        /*
@@ -400,7 +400,7 @@ int get_clocks (void)
         */
 #if defined(CONFIG_MPC8540) || defined(CONFIG_MPC8541) || \
        defined(CONFIG_MPC8560) || defined(CONFIG_MPC8555)
-       gd->arch.i2c1_clk = sys_info.freqSystemBus;
+       gd->arch.i2c1_clk = sys_info.freq_systembus;
 #elif defined(CONFIG_MPC8544)
        /*
         * On the 8544, the I2C clock is the same as the SEC clock.  This can be
@@ -410,12 +410,12 @@ int get_clocks (void)
         * PORDEVSR2_SEC_CFG bit is 0 on all 85xx boards that are not an 8544.
         */
        if (gur->pordevsr2 & MPC85xx_PORDEVSR2_SEC_CFG)
-               gd->arch.i2c1_clk = sys_info.freqSystemBus / 3;
+               gd->arch.i2c1_clk = sys_info.freq_systembus / 3;
        else
-               gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
+               gd->arch.i2c1_clk = sys_info.freq_systembus / 2;
 #else
        /* Most 85xx SOCs use CCB/2, so this is the default behavior. */
-       gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
+       gd->arch.i2c1_clk = sys_info.freq_systembus / 2;
 #endif
        gd->arch.i2c2_clk = gd->arch.i2c1_clk;
 
@@ -429,7 +429,7 @@ int get_clocks (void)
 #endif /* defined(CONFIG_FSL_ESDHC) */
 
 #if defined(CONFIG_CPM2)
-       gd->arch.vco_out = 2*sys_info.freqSystemBus;
+       gd->arch.vco_out = 2*sys_info.freq_systembus;
        gd->arch.cpm_clk = gd->arch.vco_out / 2;
        gd->arch.scc_clk = gd->arch.vco_out / 4;
        gd->arch.brg_clk = gd->arch.vco_out / (1 << (2 * (dfbrg + 1)));

diff --git a/arch/powerpc/cpu/mpc86xx/cpu.c b/arch/powerpc/cpu/mpc86xx/cpu.c
index d6b28dd077c5a2740905479fd5f72c546af11cc0..ab3250ba4b97936080c4a343f0a3b331c4365b7c 100644 (file)
--- a/arch/powerpc/cpu/mpc86xx/cpu.c
+++ b/arch/powerpc/cpu/mpc86xx/cpu.c
@@ -72,17 +72,17 @@ checkcpu(void)
        get_sys_info(&sysinfo);
 
        puts("Clock Configuration:\n");
-       printf("       CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freqProcessor));
-       printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freqSystemBus));
+       printf("       CPU:%-4s MHz, ", strmhz(buf1, sysinfo.freq_processor));
+       printf("MPX:%-4s MHz\n", strmhz(buf1, sysinfo.freq_systembus));
        printf("       DDR:%-4s MHz (%s MT/s data rate), ",
-               strmhz(buf1, sysinfo.freqSystemBus / 2),
-               strmhz(buf2, sysinfo.freqSystemBus));
+               strmhz(buf1, sysinfo.freq_systembus / 2),
+               strmhz(buf2, sysinfo.freq_systembus));
 
-       if (sysinfo.freqLocalBus > LCRR_CLKDIV) {
-               printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freqLocalBus));
+       if (sysinfo.freq_localbus > LCRR_CLKDIV) {
+               printf("LBC:%-4s MHz\n", strmhz(buf1, sysinfo.freq_localbus));
        } else {
                printf("LBC: unknown (LCRR[CLKDIV] = 0x%02lx)\n",
-                      sysinfo.freqLocalBus);
+                      sysinfo.freq_localbus);
        }
 
        puts("L1:    D-cache 32 KB enabled\n");
@@ -131,7 +131,7 @@ get_tbclk(void)
        sys_info_t sys_info;
 
        get_sys_info(&sys_info);
-       return (sys_info.freqSystemBus + 3L) / 4L;
+       return (sys_info.freq_systembus + 3L) / 4L;
 }
 
 

diff --git a/arch/powerpc/cpu/mpc86xx/speed.c b/arch/powerpc/cpu/mpc86xx/speed.c
index ea366ab9e4c18dd7163ad1e2a681a434e67c8823..854d02b5c49211ea526329202efd124978bb9bff 100644 (file)
--- a/arch/powerpc/cpu/mpc86xx/speed.c
+++ b/arch/powerpc/cpu/mpc86xx/speed.c
@@ -19,7 +19,7 @@ DECLARE_GLOBAL_DATA_PTR;
 /* used in some defintiions of CONFIG_SYS_CLK_FREQ */
 extern unsigned long get_board_sys_clk(unsigned long dummy);
 
-void get_sys_info(sys_info_t *sysInfo)
+void get_sys_info(sys_info_t *sys_info)
 {
        volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
        volatile ccsr_gur_t *gur = &immap->im_gur;
@@ -31,7 +31,7 @@ void get_sys_info(sys_info_t *sysInfo)
 
        switch (plat_ratio) {
        case 0x0:
-               sysInfo->freqSystemBus = 16 * CONFIG_SYS_CLK_FREQ;
+               sys_info->freq_systembus = 16 * CONFIG_SYS_CLK_FREQ;
                break;
        case 0x02:
        case 0x03:
@@ -43,10 +43,10 @@ void get_sys_info(sys_info_t *sysInfo)
        case 0x0a:
        case 0x0c:
        case 0x10:
-               sysInfo->freqSystemBus = plat_ratio * CONFIG_SYS_CLK_FREQ;
+               sys_info->freq_systembus = plat_ratio * CONFIG_SYS_CLK_FREQ;
                break;
        default:
-               sysInfo->freqSystemBus = 0;
+               sys_info->freq_systembus = 0;
                break;
        }
 
@@ -55,25 +55,26 @@ void get_sys_info(sys_info_t *sysInfo)
 
        switch (e600_ratio) {
        case 0x10:
-               sysInfo->freqProcessor = 2 * sysInfo->freqSystemBus;
+               sys_info->freq_processor = 2 * sys_info->freq_systembus;
                break;
        case 0x19:
-               sysInfo->freqProcessor = 5 * sysInfo->freqSystemBus / 2;
+               sys_info->freq_processor = 5 * sys_info->freq_systembus / 2;
                break;
        case 0x20:
-               sysInfo->freqProcessor = 3 * sysInfo->freqSystemBus;
+               sys_info->freq_processor = 3 * sys_info->freq_systembus;
                break;
        case 0x39:
-               sysInfo->freqProcessor = 7 * sysInfo->freqSystemBus / 2;
+               sys_info->freq_processor = 7 * sys_info->freq_systembus / 2;
                break;
        case 0x28:
-               sysInfo->freqProcessor = 4 * sysInfo->freqSystemBus;
+               sys_info->freq_processor = 4 * sys_info->freq_systembus;
                break;
        case 0x1d:
-               sysInfo->freqProcessor = 9 * sysInfo->freqSystemBus / 2;
+               sys_info->freq_processor = 9 * sys_info->freq_systembus / 2;
                break;
        default:
-               sysInfo->freqProcessor = e600_ratio + sysInfo->freqSystemBus;
+               sys_info->freq_processor = e600_ratio +
+                                               sys_info->freq_systembus;
                break;
        }
 
@@ -84,10 +85,11 @@ void get_sys_info(sys_info_t *sysInfo)
        lcrr_div = in_be32(&immap->im_lbc.lcrr) & LCRR_CLKDIV;
 #endif
        if (lcrr_div == 2 || lcrr_div == 4 || lcrr_div == 8) {
-               sysInfo->freqLocalBus = sysInfo->freqSystemBus / (lcrr_div * 2);
+               sys_info->freq_localbus = sys_info->freq_systembus
+                                                       / (lcrr_div * 2);
        } else {
                /* In case anyone cares what the unknown value is */
-               sysInfo->freqLocalBus = lcrr_div;
+               sys_info->freq_localbus = lcrr_div;
        }
 }
 
@@ -102,9 +104,9 @@ int get_clocks(void)
        sys_info_t sys_info;
 
        get_sys_info(&sys_info);
-       gd->cpu_clk = sys_info.freqProcessor;
-       gd->bus_clk = sys_info.freqSystemBus;
-       gd->arch.lbc_clk = sys_info.freqLocalBus;
+       gd->cpu_clk = sys_info.freq_processor;
+       gd->bus_clk = sys_info.freq_systembus;
+       gd->arch.lbc_clk = sys_info.freq_localbus;
 
        /*
         * The base clock for I2C depends on the actual SOC.  Unfortunately,
@@ -114,9 +116,9 @@ int get_clocks(void)
         * AN2919.
         */
 #ifdef CONFIG_MPC8610
-       gd->arch.i2c1_clk = sys_info.freqSystemBus;
+       gd->arch.i2c1_clk = sys_info.freq_systembus;
 #else
-       gd->arch.i2c1_clk = sys_info.freqSystemBus / 2;
+       gd->arch.i2c1_clk = sys_info.freq_systembus / 2;
 #endif
        gd->arch.i2c2_clk = gd->arch.i2c1_clk;
 
@@ -138,7 +140,7 @@ ulong get_bus_freq(ulong dummy)
        sys_info_t sys_info;
 
        get_sys_info(&sys_info);
-       val = sys_info.freqSystemBus;
+       val = sys_info.freq_systembus;
 
        return val;
 }

diff --git a/board/freescale/mpc8540ads/mpc8540ads.c b/board/freescale/mpc8540ads/mpc8540ads.c
index 7a84cd295a2d5ea3c6bf69193c02aba1e8508ffd..2fb40374283cdb07bc132cadc78a45bd49e865bb 100644 (file)
--- a/board/freescale/mpc8540ads/mpc8540ads.c
+++ b/board/freescale/mpc8540ads/mpc8540ads.c
@@ -68,7 +68,7 @@ local_bus_init(void)
 
        get_sys_info(&sysinfo);
        clkdiv = lbc->lcrr & LCRR_CLKDIV;
-       lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
+       lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
 
        if (lbc_hz < 66) {
                lbc->lcrr = CONFIG_SYS_LBC_LCRR | LCRR_DBYP;    /* DLL Bypass */

diff --git a/board/freescale/mpc8541cds/mpc8541cds.c b/board/freescale/mpc8541cds/mpc8541cds.c
index 3d2dabd1169a52087d644796a48ddb26288c2514..1e21a664c1f424af2e15a7c788a3063271ed53f8 100644 (file)
--- a/board/freescale/mpc8541cds/mpc8541cds.c
+++ b/board/freescale/mpc8541cds/mpc8541cds.c
@@ -250,7 +250,7 @@ local_bus_init(void)
 
        get_sys_info(&sysinfo);
        clkdiv = lbc->lcrr & LCRR_CLKDIV;
-       lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
+       lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
 
        if (lbc_hz < 66) {
                lbc->lcrr |= LCRR_DBYP; /* DLL Bypass */

diff --git a/board/freescale/mpc8555cds/mpc8555cds.c b/board/freescale/mpc8555cds/mpc8555cds.c
index d4e7abebd43449dc68a1aa6c690e94acc0d9c439..ee9269504cb3c558a63479e0b671138865e61385 100644 (file)
--- a/board/freescale/mpc8555cds/mpc8555cds.c
+++ b/board/freescale/mpc8555cds/mpc8555cds.c
@@ -248,7 +248,7 @@ local_bus_init(void)
 
        get_sys_info(&sysinfo);
        clkdiv = lbc->lcrr & LCRR_CLKDIV;
-       lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
+       lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
 
        if (lbc_hz < 66) {
                lbc->lcrr |= LCRR_DBYP; /* DLL Bypass */

diff --git a/board/freescale/mpc8560ads/mpc8560ads.c b/board/freescale/mpc8560ads/mpc8560ads.c
index a45a5583c9362ad3739bdd771f337ee458417a11..162636ef8c0bbdeb98b6183c6b62e6f9cd00727b 100644 (file)
--- a/board/freescale/mpc8560ads/mpc8560ads.c
+++ b/board/freescale/mpc8560ads/mpc8560ads.c
@@ -273,7 +273,7 @@ local_bus_init(void)
 
        get_sys_info(&sysinfo);
        clkdiv = lbc->lcrr & LCRR_CLKDIV;
-       lbc_hz = sysinfo.freqSystemBus / 1000000 / clkdiv;
+       lbc_hz = sysinfo.freq_systembus / 1000000 / clkdiv;
 
        if (lbc_hz < 66) {
                lbc->lcrr = CONFIG_SYS_LBC_LCRR | LCRR_DBYP;    /* DLL Bypass */

diff --git a/board/freescale/p1_p2_rdb_pc/ddr.c b/board/freescale/p1_p2_rdb_pc/ddr.c
index 5c51845ddfc0e95e92b9197aff9fa7a12701e25d..c0b72e035e924a9e295165b6d92c9e4a48ee5fa4 100644 (file)
--- a/board/freescale/p1_p2_rdb_pc/ddr.c
+++ b/board/freescale/p1_p2_rdb_pc/ddr.c
@@ -247,7 +247,7 @@ phys_size_t fixed_sdram(void)
 
        get_sys_info(&sysinfo);
        printf("Configuring DDR for %s MT/s data rate\n",
-                       strmhz(buf, sysinfo.freqDDRBus));
+                       strmhz(buf, sysinfo.freq_ddrbus));
 
        ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
 

diff --git a/board/freescale/p1_twr/ddr.c b/board/freescale/p1_twr/ddr.c
index 697c0dd370251f268d36bacf61c9f4a385d4a79a..67f69d79bd6fcbabaf7523d9ef56e0d3ed984882 100644 (file)
--- a/board/freescale/p1_twr/ddr.c
+++ b/board/freescale/p1_twr/ddr.c
@@ -53,7 +53,7 @@ phys_size_t fixed_sdram(void)
 
        get_sys_info(&sysinfo);
        printf("Configuring DDR for %s MT/s data rate\n",
-                       strmhz(buf, sysinfo.freqDDRBus));
+                       strmhz(buf, sysinfo.freq_ddrbus));
 
        ddr_size = CONFIG_SYS_SDRAM_SIZE * 1024 * 1024;
 

diff --git a/board/sbc8548/sbc8548.c b/board/sbc8548/sbc8548.c
index dee8710316023523d7b8055fc492d1df66f23ad7..837851838d6b93dae8f882f490ce17bff8d758ed 100644 (file)
--- a/board/sbc8548/sbc8548.c
+++ b/board/sbc8548/sbc8548.c
@@ -65,8 +65,8 @@ local_bus_init(void)
 
        get_sys_info(&sysinfo);
 
-       lbc_mhz = sysinfo.freqLocalBus / 1000000;
-       clkdiv = sysinfo.freqSystemBus / sysinfo.freqLocalBus;
+       lbc_mhz = sysinfo.freq_localbus / 1000000;
+       clkdiv = sysinfo.freq_systembus / sysinfo.freq_localbus;
 
        debug("LCRR=0x%x, CD=%d, MHz=%d\n", lcrr, clkdiv, lbc_mhz);
 

diff --git a/board/socrates/socrates.c b/board/socrates/socrates.c
index 97fd0e4bd10ca7d68919251b4655906242312acf..2caefbbe5844a217b4380160b00044c60b609826 100644 (file)
--- a/board/socrates/socrates.c
+++ b/board/socrates/socrates.c
@@ -143,7 +143,7 @@ void local_bus_init (void)
 
        get_sys_info (&sysinfo);
        clkdiv = lbc->lcrr & LCRR_CLKDIV;
-       lbc_mhz = sysinfo.freqSystemBus / 1000000 / clkdiv;
+       lbc_mhz = sysinfo.freq_systembus / 1000000 / clkdiv;
 
        /* Disable PLL bypass for Local Bus Clock >= 66 MHz */
        if (lbc_mhz >= 66)

diff --git a/board/xes/xpedite537x/ddr.c b/board/xes/xpedite537x/ddr.c
index 0daa189103da337859898d331ed73b0e2a4f6103..c128fcb53dbb6734af04c713f1ea6f1632f69544 100644 (file)
--- a/board/xes/xpedite537x/ddr.c
+++ b/board/xes/xpedite537x/ddr.c
@@ -210,7 +210,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
        unsigned int datarate;
 
        get_sys_info(&sysinfo);
-       datarate = sysinfo.freqDDRBus / 1000 / 1000;
+       datarate = sysinfo.freq_ddrbus / 1000 / 1000;
 
        for (i = 0; i < ARRAY_SIZE(bopts_ctrl[ctrl_num]); i++) {
                if ((bopts[i].datarate_mhz_low <= datarate) &&

diff --git a/drivers/spi/fsl_espi.c b/drivers/spi/fsl_espi.c
index c883d3cac068e02cfb3a8831cd06fc78fc5130c6..7c845827627bc2a276e326f7119fab2c485fffc9 100644 (file)
--- a/drivers/spi/fsl_espi.c
+++ b/drivers/spi/fsl_espi.c
@@ -75,7 +75,7 @@ struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
 
        /* Set eSPI BRG clock source */
        get_sys_info(&sysinfo);
-       spibrg = sysinfo.freqSystemBus / 2;
+       spibrg = sysinfo.freq_systembus / 2;
        fsl->div16 = 0;
        if ((spibrg / max_hz) > 32) {
                fsl->div16 = ESPI_CSMODE_DIV16;

diff --git a/include/e500.h b/include/e500.h
index 0ff8e89a1e345f8274f3c83da715f301ca1ce0a8..0c2432657be189546c20032204af0dd1ab0b83db 100644 (file)
--- a/include/e500.h
+++ b/include/e500.h
@@ -10,19 +10,19 @@
 
 typedef struct
 {
-  unsigned long freqProcessor[CONFIG_MAX_CPUS];
-  unsigned long freqSystemBus;
-  unsigned long freqDDRBus;
-  unsigned long freqLocalBus;
-  unsigned long freqQE;
+       unsigned long freq_processor[CONFIG_MAX_CPUS];
+       unsigned long freq_systembus;
+       unsigned long freq_ddrbus;
+       unsigned long freq_localbus;
+       unsigned long freq_qe;
 #ifdef CONFIG_SYS_DPAA_FMAN
-  unsigned long freqFMan[CONFIG_SYS_NUM_FMAN];
+       unsigned long freq_fman[CONFIG_SYS_NUM_FMAN];
 #endif
 #ifdef CONFIG_SYS_DPAA_QBMAN
-  unsigned long freqQMAN;
+       unsigned long freq_qman;
 #endif
 #ifdef CONFIG_SYS_DPAA_PME
-  unsigned long freqPME;
+       unsigned long freq_pme;
 #endif
 } MPC85xx_SYS_INFO;
 

diff --git a/include/mpc86xx.h b/include/mpc86xx.h
index 31e83f2cc9213377fc55ae8473c96e9e0c40fd47..9fe47480325354270ec9b5cee7194b7d1025464d 100644 (file)
--- a/include/mpc86xx.h
+++ b/include/mpc86xx.h
@@ -41,9 +41,9 @@
 #ifndef __ASSEMBLY__
 
 typedef struct {
-       unsigned long freqProcessor;
-       unsigned long freqSystemBus;
-       unsigned long freqLocalBus;
+       unsigned long freq_processor;
+       unsigned long freq_systembus;
+       unsigned long freq_localbus;
 } MPC86xx_SYS_INFO;
 
 #define l1icache_enable        icache_enable