pinctrl: renesas: r8a77951: Add R8A774E1 PFC support

Renesas RZ/G2H (r8a774e1) is pin compatible with R-Car H3 (r8a77951),
however it doesn't have several automotive specific peripherals. Add
a r8a77951 specific pin groups/functions along with common pin
groups/functions for supporting both r8a77951 and r8a774e1 SoC.

PFC changes are synced from mainline linux-5.9 commit
bbf5c979011a ("Linux 5.9").

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

diff --git a/arch/arm/mach-rmobile/Kconfig.64 b/arch/arm/mach-rmobile/Kconfig.64
index 91aa4ddbae35ee95f666e0b7b1b4da0ee055e195..0ef6cf619b4701bf3fca308efce7893fd4f8747a 100644 (file)
--- a/arch/arm/mach-rmobile/Kconfig.64
+++ b/arch/arm/mach-rmobile/Kconfig.64
@@ -17,6 +17,7 @@ config R8A774C0
 config R8A774E1
        bool "Renesas SoC R8A774E1"
        imply CLK_R8A774E1
+       imply PINCTRL_PFC_R8A774E1
 
 config R8A7795
        bool "Renesas SoC R8A7795"

diff --git a/drivers/pinctrl/renesas/Kconfig b/drivers/pinctrl/renesas/Kconfig
index 0d839eecadd4ed9470a9290a3a150c79f278ea58..d2be4c84ba11c8be22f94fdd30fc83b0e49103b3 100644 (file)
--- a/drivers/pinctrl/renesas/Kconfig
+++ b/drivers/pinctrl/renesas/Kconfig
@@ -77,6 +77,16 @@ config PINCTRL_PFC_R8A774B1
           the GPIO definitions and pin control functions for each available
           multiplex function.
 
+config PINCTRL_PFC_R8A774E1
+        bool "Renesas RZ/G2 R8A774E1 pin control driver"
+        depends on PINCTRL_PFC
+        help
+          Support pin multiplexing control on Renesas RZ/G2H R8A774E1 SoCs.
+
+          The driver is controlled by a device tree node which contains both
+          the GPIO definitions and pin control functions for each available
+          multiplex function.
+
 config PINCTRL_PFC_R8A7795
        bool "Renesas RCar Gen3 R8A7795 pin control driver"
        depends on PINCTRL_PFC

diff --git a/drivers/pinctrl/renesas/Makefile b/drivers/pinctrl/renesas/Makefile
index 59dfd05b2c4082578d00203b379056c21ca1c33a..1d0075205128d20fb59e764ddd4171f2cc6b8fed 100644 (file)
--- a/drivers/pinctrl/renesas/Makefile
+++ b/drivers/pinctrl/renesas/Makefile
@@ -1,6 +1,7 @@
 obj-$(CONFIG_PINCTRL_PFC) += pfc.o
 obj-$(CONFIG_PINCTRL_PFC_R8A774A1) += pfc-r8a7796.o
 obj-$(CONFIG_PINCTRL_PFC_R8A774B1) += pfc-r8a77965.o
+obj-$(CONFIG_PINCTRL_PFC_R8A774E1) += pfc-r8a7795.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7790) += pfc-r8a7790.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7791) += pfc-r8a7791.o
 obj-$(CONFIG_PINCTRL_PFC_R8A7792) += pfc-r8a7792.o

diff --git a/drivers/pinctrl/renesas/pfc-r8a7795.c b/drivers/pinctrl/renesas/pfc-r8a7795.c
index ba17a5577524c36afce31b2c48e3944e84d28688..b787c4883a4edad61c3a3751e67cf722767a4741 100644 (file)
--- a/drivers/pinctrl/renesas/pfc-r8a7795.c
+++ b/drivers/pinctrl/renesas/pfc-r8a7795.c
@@ -683,7 +683,7 @@ static const u16 pinmux_data[] = {
        PINMUX_IPSR_PHYS_MSEL(IP1_23_20, HRX3_D,                I2C_SEL_3_0,    SEL_HSCIF3_3),
        PINMUX_IPSR_PHYS_MSEL(IP1_23_20, VI4_DATA7_B,           I2C_SEL_3_0,    SEL_VIN4_1),
        PINMUX_IPSR_PHYS_MSEL(IP1_23_20, IERX_B,                I2C_SEL_3_0,    SEL_IEBUS_1),
-       PINMUX_IPSR_PHYS(IP0_23_20,     SCL3,                   I2C_SEL_3_1),
+       PINMUX_IPSR_PHYS(IP1_23_20,     SCL3,                   I2C_SEL_3_1),
 
        PINMUX_IPSR_PHYS_MSEL(IP1_27_24, PWM2_A,                I2C_SEL_3_0,    SEL_PWM2_0),
        PINMUX_IPSR_PHYS_MSEL(IP1_27_24, HTX3_D,                I2C_SEL_3_0,    SEL_HSCIF3_3),
@@ -3902,6 +3902,36 @@ static const unsigned int tmu_tclk2_b_mux[] = {
        TCLK2_B_MARK,
 };
 
+/* - TPU ------------------------------------------------------------------- */
+static const unsigned int tpu_to0_pins[] = {
+       /* TPU0TO0 */
+       RCAR_GP_PIN(6, 28),
+};
+static const unsigned int tpu_to0_mux[] = {
+       TPU0TO0_MARK,
+};
+static const unsigned int tpu_to1_pins[] = {
+       /* TPU0TO1 */
+       RCAR_GP_PIN(6, 29),
+};
+static const unsigned int tpu_to1_mux[] = {
+       TPU0TO1_MARK,
+};
+static const unsigned int tpu_to2_pins[] = {
+       /* TPU0TO2 */
+       RCAR_GP_PIN(6, 30),
+};
+static const unsigned int tpu_to2_mux[] = {
+       TPU0TO2_MARK,
+};
+static const unsigned int tpu_to3_pins[] = {
+       /* TPU0TO3 */
+       RCAR_GP_PIN(6, 31),
+};
+static const unsigned int tpu_to3_mux[] = {
+       TPU0TO3_MARK,
+};
+
 /* - USB0 ------------------------------------------------------------------- */
 static const unsigned int usb0_pins[] = {
        /* PWEN, OVC */
@@ -4136,353 +4166,365 @@ static const unsigned int vin5_clk_mux[] = {
        VI5_CLK_MARK,
 };
 
-static const struct sh_pfc_pin_group pinmux_groups[] = {
-       SH_PFC_PIN_GROUP(audio_clk_a_a),
-       SH_PFC_PIN_GROUP(audio_clk_a_b),
-       SH_PFC_PIN_GROUP(audio_clk_a_c),
-       SH_PFC_PIN_GROUP(audio_clk_b_a),
-       SH_PFC_PIN_GROUP(audio_clk_b_b),
-       SH_PFC_PIN_GROUP(audio_clk_c_a),
-       SH_PFC_PIN_GROUP(audio_clk_c_b),
-       SH_PFC_PIN_GROUP(audio_clkout_a),
-       SH_PFC_PIN_GROUP(audio_clkout_b),
-       SH_PFC_PIN_GROUP(audio_clkout_c),
-       SH_PFC_PIN_GROUP(audio_clkout_d),
-       SH_PFC_PIN_GROUP(audio_clkout1_a),
-       SH_PFC_PIN_GROUP(audio_clkout1_b),
-       SH_PFC_PIN_GROUP(audio_clkout2_a),
-       SH_PFC_PIN_GROUP(audio_clkout2_b),
-       SH_PFC_PIN_GROUP(audio_clkout3_a),
-       SH_PFC_PIN_GROUP(audio_clkout3_b),
-       SH_PFC_PIN_GROUP(avb_link),
-       SH_PFC_PIN_GROUP(avb_magic),
-       SH_PFC_PIN_GROUP(avb_phy_int),
-       SH_PFC_PIN_GROUP_ALIAS(avb_mdc, avb_mdio),      /* Deprecated */
-       SH_PFC_PIN_GROUP(avb_mdio),
-       SH_PFC_PIN_GROUP(avb_mii),
-       SH_PFC_PIN_GROUP(avb_avtp_pps),
-       SH_PFC_PIN_GROUP(avb_avtp_match_a),
-       SH_PFC_PIN_GROUP(avb_avtp_capture_a),
-       SH_PFC_PIN_GROUP(avb_avtp_match_b),
-       SH_PFC_PIN_GROUP(avb_avtp_capture_b),
-       SH_PFC_PIN_GROUP(can0_data_a),
-       SH_PFC_PIN_GROUP(can0_data_b),
-       SH_PFC_PIN_GROUP(can1_data),
-       SH_PFC_PIN_GROUP(can_clk),
-       SH_PFC_PIN_GROUP(canfd0_data_a),
-       SH_PFC_PIN_GROUP(canfd0_data_b),
-       SH_PFC_PIN_GROUP(canfd1_data),
-       SH_PFC_PIN_GROUP(drif0_ctrl_a),
-       SH_PFC_PIN_GROUP(drif0_data0_a),
-       SH_PFC_PIN_GROUP(drif0_data1_a),
-       SH_PFC_PIN_GROUP(drif0_ctrl_b),
-       SH_PFC_PIN_GROUP(drif0_data0_b),
-       SH_PFC_PIN_GROUP(drif0_data1_b),
-       SH_PFC_PIN_GROUP(drif0_ctrl_c),
-       SH_PFC_PIN_GROUP(drif0_data0_c),
-       SH_PFC_PIN_GROUP(drif0_data1_c),
-       SH_PFC_PIN_GROUP(drif1_ctrl_a),
-       SH_PFC_PIN_GROUP(drif1_data0_a),
-       SH_PFC_PIN_GROUP(drif1_data1_a),
-       SH_PFC_PIN_GROUP(drif1_ctrl_b),
-       SH_PFC_PIN_GROUP(drif1_data0_b),
-       SH_PFC_PIN_GROUP(drif1_data1_b),
-       SH_PFC_PIN_GROUP(drif1_ctrl_c),
-       SH_PFC_PIN_GROUP(drif1_data0_c),
-       SH_PFC_PIN_GROUP(drif1_data1_c),
-       SH_PFC_PIN_GROUP(drif2_ctrl_a),
-       SH_PFC_PIN_GROUP(drif2_data0_a),
-       SH_PFC_PIN_GROUP(drif2_data1_a),
-       SH_PFC_PIN_GROUP(drif2_ctrl_b),
-       SH_PFC_PIN_GROUP(drif2_data0_b),
-       SH_PFC_PIN_GROUP(drif2_data1_b),
-       SH_PFC_PIN_GROUP(drif3_ctrl_a),
-       SH_PFC_PIN_GROUP(drif3_data0_a),
-       SH_PFC_PIN_GROUP(drif3_data1_a),
-       SH_PFC_PIN_GROUP(drif3_ctrl_b),
-       SH_PFC_PIN_GROUP(drif3_data0_b),
-       SH_PFC_PIN_GROUP(drif3_data1_b),
-       SH_PFC_PIN_GROUP(du_rgb666),
-       SH_PFC_PIN_GROUP(du_rgb888),
-       SH_PFC_PIN_GROUP(du_clk_out_0),
-       SH_PFC_PIN_GROUP(du_clk_out_1),
-       SH_PFC_PIN_GROUP(du_sync),
-       SH_PFC_PIN_GROUP(du_oddf),
-       SH_PFC_PIN_GROUP(du_cde),
-       SH_PFC_PIN_GROUP(du_disp),
-       SH_PFC_PIN_GROUP(hscif0_data),
-       SH_PFC_PIN_GROUP(hscif0_clk),
-       SH_PFC_PIN_GROUP(hscif0_ctrl),
-       SH_PFC_PIN_GROUP(hscif1_data_a),
-       SH_PFC_PIN_GROUP(hscif1_clk_a),
-       SH_PFC_PIN_GROUP(hscif1_ctrl_a),
-       SH_PFC_PIN_GROUP(hscif1_data_b),
-       SH_PFC_PIN_GROUP(hscif1_clk_b),
-       SH_PFC_PIN_GROUP(hscif1_ctrl_b),
-       SH_PFC_PIN_GROUP(hscif2_data_a),
-       SH_PFC_PIN_GROUP(hscif2_clk_a),
-       SH_PFC_PIN_GROUP(hscif2_ctrl_a),
-       SH_PFC_PIN_GROUP(hscif2_data_b),
-       SH_PFC_PIN_GROUP(hscif2_clk_b),
-       SH_PFC_PIN_GROUP(hscif2_ctrl_b),
-       SH_PFC_PIN_GROUP(hscif2_data_c),
-       SH_PFC_PIN_GROUP(hscif2_clk_c),
-       SH_PFC_PIN_GROUP(hscif2_ctrl_c),
-       SH_PFC_PIN_GROUP(hscif3_data_a),
-       SH_PFC_PIN_GROUP(hscif3_clk),
-       SH_PFC_PIN_GROUP(hscif3_ctrl),
-       SH_PFC_PIN_GROUP(hscif3_data_b),
-       SH_PFC_PIN_GROUP(hscif3_data_c),
-       SH_PFC_PIN_GROUP(hscif3_data_d),
-       SH_PFC_PIN_GROUP(hscif4_data_a),
-       SH_PFC_PIN_GROUP(hscif4_clk),
-       SH_PFC_PIN_GROUP(hscif4_ctrl),
-       SH_PFC_PIN_GROUP(hscif4_data_b),
-       SH_PFC_PIN_GROUP(i2c0),
-       SH_PFC_PIN_GROUP(i2c1_a),
-       SH_PFC_PIN_GROUP(i2c1_b),
-       SH_PFC_PIN_GROUP(i2c2_a),
-       SH_PFC_PIN_GROUP(i2c2_b),
-       SH_PFC_PIN_GROUP(i2c3),
-       SH_PFC_PIN_GROUP(i2c5),
-       SH_PFC_PIN_GROUP(i2c6_a),
-       SH_PFC_PIN_GROUP(i2c6_b),
-       SH_PFC_PIN_GROUP(i2c6_c),
-       SH_PFC_PIN_GROUP(intc_ex_irq0),
-       SH_PFC_PIN_GROUP(intc_ex_irq1),
-       SH_PFC_PIN_GROUP(intc_ex_irq2),
-       SH_PFC_PIN_GROUP(intc_ex_irq3),
-       SH_PFC_PIN_GROUP(intc_ex_irq4),
-       SH_PFC_PIN_GROUP(intc_ex_irq5),
-       SH_PFC_PIN_GROUP(msiof0_clk),
-       SH_PFC_PIN_GROUP(msiof0_sync),
-       SH_PFC_PIN_GROUP(msiof0_ss1),
-       SH_PFC_PIN_GROUP(msiof0_ss2),
-       SH_PFC_PIN_GROUP(msiof0_txd),
-       SH_PFC_PIN_GROUP(msiof0_rxd),
-       SH_PFC_PIN_GROUP(msiof1_clk_a),
-       SH_PFC_PIN_GROUP(msiof1_sync_a),
-       SH_PFC_PIN_GROUP(msiof1_ss1_a),
-       SH_PFC_PIN_GROUP(msiof1_ss2_a),
-       SH_PFC_PIN_GROUP(msiof1_txd_a),
-       SH_PFC_PIN_GROUP(msiof1_rxd_a),
-       SH_PFC_PIN_GROUP(msiof1_clk_b),
-       SH_PFC_PIN_GROUP(msiof1_sync_b),
-       SH_PFC_PIN_GROUP(msiof1_ss1_b),
-       SH_PFC_PIN_GROUP(msiof1_ss2_b),
-       SH_PFC_PIN_GROUP(msiof1_txd_b),
-       SH_PFC_PIN_GROUP(msiof1_rxd_b),
-       SH_PFC_PIN_GROUP(msiof1_clk_c),
-       SH_PFC_PIN_GROUP(msiof1_sync_c),
-       SH_PFC_PIN_GROUP(msiof1_ss1_c),
-       SH_PFC_PIN_GROUP(msiof1_ss2_c),
-       SH_PFC_PIN_GROUP(msiof1_txd_c),
-       SH_PFC_PIN_GROUP(msiof1_rxd_c),
-       SH_PFC_PIN_GROUP(msiof1_clk_d),
-       SH_PFC_PIN_GROUP(msiof1_sync_d),
-       SH_PFC_PIN_GROUP(msiof1_ss1_d),
-       SH_PFC_PIN_GROUP(msiof1_ss2_d),
-       SH_PFC_PIN_GROUP(msiof1_txd_d),
-       SH_PFC_PIN_GROUP(msiof1_rxd_d),
-       SH_PFC_PIN_GROUP(msiof1_clk_e),
-       SH_PFC_PIN_GROUP(msiof1_sync_e),
-       SH_PFC_PIN_GROUP(msiof1_ss1_e),
-       SH_PFC_PIN_GROUP(msiof1_ss2_e),
-       SH_PFC_PIN_GROUP(msiof1_txd_e),
-       SH_PFC_PIN_GROUP(msiof1_rxd_e),
-       SH_PFC_PIN_GROUP(msiof1_clk_f),
-       SH_PFC_PIN_GROUP(msiof1_sync_f),
-       SH_PFC_PIN_GROUP(msiof1_ss1_f),
-       SH_PFC_PIN_GROUP(msiof1_ss2_f),
-       SH_PFC_PIN_GROUP(msiof1_txd_f),
-       SH_PFC_PIN_GROUP(msiof1_rxd_f),
-       SH_PFC_PIN_GROUP(msiof1_clk_g),
-       SH_PFC_PIN_GROUP(msiof1_sync_g),
-       SH_PFC_PIN_GROUP(msiof1_ss1_g),
-       SH_PFC_PIN_GROUP(msiof1_ss2_g),
-       SH_PFC_PIN_GROUP(msiof1_txd_g),
-       SH_PFC_PIN_GROUP(msiof1_rxd_g),
-       SH_PFC_PIN_GROUP(msiof2_clk_a),
-       SH_PFC_PIN_GROUP(msiof2_sync_a),
-       SH_PFC_PIN_GROUP(msiof2_ss1_a),
-       SH_PFC_PIN_GROUP(msiof2_ss2_a),
-       SH_PFC_PIN_GROUP(msiof2_txd_a),
-       SH_PFC_PIN_GROUP(msiof2_rxd_a),
-       SH_PFC_PIN_GROUP(msiof2_clk_b),
-       SH_PFC_PIN_GROUP(msiof2_sync_b),
-       SH_PFC_PIN_GROUP(msiof2_ss1_b),
-       SH_PFC_PIN_GROUP(msiof2_ss2_b),
-       SH_PFC_PIN_GROUP(msiof2_txd_b),
-       SH_PFC_PIN_GROUP(msiof2_rxd_b),
-       SH_PFC_PIN_GROUP(msiof2_clk_c),
-       SH_PFC_PIN_GROUP(msiof2_sync_c),
-       SH_PFC_PIN_GROUP(msiof2_ss1_c),
-       SH_PFC_PIN_GROUP(msiof2_ss2_c),
-       SH_PFC_PIN_GROUP(msiof2_txd_c),
-       SH_PFC_PIN_GROUP(msiof2_rxd_c),
-       SH_PFC_PIN_GROUP(msiof2_clk_d),
-       SH_PFC_PIN_GROUP(msiof2_sync_d),
-       SH_PFC_PIN_GROUP(msiof2_ss1_d),
-       SH_PFC_PIN_GROUP(msiof2_ss2_d),
-       SH_PFC_PIN_GROUP(msiof2_txd_d),
-       SH_PFC_PIN_GROUP(msiof2_rxd_d),
-       SH_PFC_PIN_GROUP(msiof3_clk_a),
-       SH_PFC_PIN_GROUP(msiof3_sync_a),
-       SH_PFC_PIN_GROUP(msiof3_ss1_a),
-       SH_PFC_PIN_GROUP(msiof3_ss2_a),
-       SH_PFC_PIN_GROUP(msiof3_txd_a),
-       SH_PFC_PIN_GROUP(msiof3_rxd_a),
-       SH_PFC_PIN_GROUP(msiof3_clk_b),
-       SH_PFC_PIN_GROUP(msiof3_sync_b),
-       SH_PFC_PIN_GROUP(msiof3_ss1_b),
-       SH_PFC_PIN_GROUP(msiof3_ss2_b),
-       SH_PFC_PIN_GROUP(msiof3_txd_b),
-       SH_PFC_PIN_GROUP(msiof3_rxd_b),
-       SH_PFC_PIN_GROUP(msiof3_clk_c),
-       SH_PFC_PIN_GROUP(msiof3_sync_c),
-       SH_PFC_PIN_GROUP(msiof3_txd_c),
-       SH_PFC_PIN_GROUP(msiof3_rxd_c),
-       SH_PFC_PIN_GROUP(msiof3_clk_d),
-       SH_PFC_PIN_GROUP(msiof3_sync_d),
-       SH_PFC_PIN_GROUP(msiof3_ss1_d),
-       SH_PFC_PIN_GROUP(msiof3_txd_d),
-       SH_PFC_PIN_GROUP(msiof3_rxd_d),
-       SH_PFC_PIN_GROUP(msiof3_clk_e),
-       SH_PFC_PIN_GROUP(msiof3_sync_e),
-       SH_PFC_PIN_GROUP(msiof3_ss1_e),
-       SH_PFC_PIN_GROUP(msiof3_ss2_e),
-       SH_PFC_PIN_GROUP(msiof3_txd_e),
-       SH_PFC_PIN_GROUP(msiof3_rxd_e),
-       SH_PFC_PIN_GROUP(pwm0),
-       SH_PFC_PIN_GROUP(pwm1_a),
-       SH_PFC_PIN_GROUP(pwm1_b),
-       SH_PFC_PIN_GROUP(pwm2_a),
-       SH_PFC_PIN_GROUP(pwm2_b),
-       SH_PFC_PIN_GROUP(pwm3_a),
-       SH_PFC_PIN_GROUP(pwm3_b),
-       SH_PFC_PIN_GROUP(pwm4_a),
-       SH_PFC_PIN_GROUP(pwm4_b),
-       SH_PFC_PIN_GROUP(pwm5_a),
-       SH_PFC_PIN_GROUP(pwm5_b),
-       SH_PFC_PIN_GROUP(pwm6_a),
-       SH_PFC_PIN_GROUP(pwm6_b),
-       SH_PFC_PIN_GROUP(sata0_devslp_a),
-       SH_PFC_PIN_GROUP(sata0_devslp_b),
-       SH_PFC_PIN_GROUP(scif0_data),
-       SH_PFC_PIN_GROUP(scif0_clk),
-       SH_PFC_PIN_GROUP(scif0_ctrl),
-       SH_PFC_PIN_GROUP(scif1_data_a),
-       SH_PFC_PIN_GROUP(scif1_clk),
-       SH_PFC_PIN_GROUP(scif1_ctrl),
-       SH_PFC_PIN_GROUP(scif1_data_b),
-       SH_PFC_PIN_GROUP(scif2_data_a),
-       SH_PFC_PIN_GROUP(scif2_clk),
-       SH_PFC_PIN_GROUP(scif2_data_b),
-       SH_PFC_PIN_GROUP(scif3_data_a),
-       SH_PFC_PIN_GROUP(scif3_clk),
-       SH_PFC_PIN_GROUP(scif3_ctrl),
-       SH_PFC_PIN_GROUP(scif3_data_b),
-       SH_PFC_PIN_GROUP(scif4_data_a),
-       SH_PFC_PIN_GROUP(scif4_clk_a),
-       SH_PFC_PIN_GROUP(scif4_ctrl_a),
-       SH_PFC_PIN_GROUP(scif4_data_b),
-       SH_PFC_PIN_GROUP(scif4_clk_b),
-       SH_PFC_PIN_GROUP(scif4_ctrl_b),
-       SH_PFC_PIN_GROUP(scif4_data_c),
-       SH_PFC_PIN_GROUP(scif4_clk_c),
-       SH_PFC_PIN_GROUP(scif4_ctrl_c),
-       SH_PFC_PIN_GROUP(scif5_data_a),
-       SH_PFC_PIN_GROUP(scif5_clk_a),
-       SH_PFC_PIN_GROUP(scif5_data_b),
-       SH_PFC_PIN_GROUP(scif5_clk_b),
-       SH_PFC_PIN_GROUP(scif_clk_a),
-       SH_PFC_PIN_GROUP(scif_clk_b),
-       SH_PFC_PIN_GROUP(sdhi0_data1),
-       SH_PFC_PIN_GROUP(sdhi0_data4),
-       SH_PFC_PIN_GROUP(sdhi0_ctrl),
-       SH_PFC_PIN_GROUP(sdhi0_cd),
-       SH_PFC_PIN_GROUP(sdhi0_wp),
-       SH_PFC_PIN_GROUP(sdhi1_data1),
-       SH_PFC_PIN_GROUP(sdhi1_data4),
-       SH_PFC_PIN_GROUP(sdhi1_ctrl),
-       SH_PFC_PIN_GROUP(sdhi1_cd),
-       SH_PFC_PIN_GROUP(sdhi1_wp),
-       SH_PFC_PIN_GROUP(sdhi2_data1),
-       SH_PFC_PIN_GROUP(sdhi2_data4),
-       SH_PFC_PIN_GROUP(sdhi2_data8),
-       SH_PFC_PIN_GROUP(sdhi2_ctrl),
-       SH_PFC_PIN_GROUP(sdhi2_cd_a),
-       SH_PFC_PIN_GROUP(sdhi2_wp_a),
-       SH_PFC_PIN_GROUP(sdhi2_cd_b),
-       SH_PFC_PIN_GROUP(sdhi2_wp_b),
-       SH_PFC_PIN_GROUP(sdhi2_ds),
-       SH_PFC_PIN_GROUP(sdhi3_data1),
-       SH_PFC_PIN_GROUP(sdhi3_data4),
-       SH_PFC_PIN_GROUP(sdhi3_data8),
-       SH_PFC_PIN_GROUP(sdhi3_ctrl),
-       SH_PFC_PIN_GROUP(sdhi3_cd),
-       SH_PFC_PIN_GROUP(sdhi3_wp),
-       SH_PFC_PIN_GROUP(sdhi3_ds),
-       SH_PFC_PIN_GROUP(ssi0_data),
-       SH_PFC_PIN_GROUP(ssi01239_ctrl),
-       SH_PFC_PIN_GROUP(ssi1_data_a),
-       SH_PFC_PIN_GROUP(ssi1_data_b),
-       SH_PFC_PIN_GROUP(ssi1_ctrl_a),
-       SH_PFC_PIN_GROUP(ssi1_ctrl_b),
-       SH_PFC_PIN_GROUP(ssi2_data_a),
-       SH_PFC_PIN_GROUP(ssi2_data_b),
-       SH_PFC_PIN_GROUP(ssi2_ctrl_a),
-       SH_PFC_PIN_GROUP(ssi2_ctrl_b),
-       SH_PFC_PIN_GROUP(ssi3_data),
-       SH_PFC_PIN_GROUP(ssi349_ctrl),
-       SH_PFC_PIN_GROUP(ssi4_data),
-       SH_PFC_PIN_GROUP(ssi4_ctrl),
-       SH_PFC_PIN_GROUP(ssi5_data),
-       SH_PFC_PIN_GROUP(ssi5_ctrl),
-       SH_PFC_PIN_GROUP(ssi6_data),
-       SH_PFC_PIN_GROUP(ssi6_ctrl),
-       SH_PFC_PIN_GROUP(ssi7_data),
-       SH_PFC_PIN_GROUP(ssi78_ctrl),
-       SH_PFC_PIN_GROUP(ssi8_data),
-       SH_PFC_PIN_GROUP(ssi9_data_a),
-       SH_PFC_PIN_GROUP(ssi9_data_b),
-       SH_PFC_PIN_GROUP(ssi9_ctrl_a),
-       SH_PFC_PIN_GROUP(ssi9_ctrl_b),
-       SH_PFC_PIN_GROUP(tmu_tclk1_a),
-       SH_PFC_PIN_GROUP(tmu_tclk1_b),
-       SH_PFC_PIN_GROUP(tmu_tclk2_a),
-       SH_PFC_PIN_GROUP(tmu_tclk2_b),
-       SH_PFC_PIN_GROUP(usb0),
-       SH_PFC_PIN_GROUP(usb1),
-       SH_PFC_PIN_GROUP(usb2),
-       SH_PFC_PIN_GROUP(usb2_ch3),
-       SH_PFC_PIN_GROUP(usb30),
-       VIN_DATA_PIN_GROUP(vin4_data, 8, _a),
-       VIN_DATA_PIN_GROUP(vin4_data, 10, _a),
-       VIN_DATA_PIN_GROUP(vin4_data, 12, _a),
-       VIN_DATA_PIN_GROUP(vin4_data, 16, _a),
-       SH_PFC_PIN_GROUP(vin4_data18_a),
-       VIN_DATA_PIN_GROUP(vin4_data, 20, _a),
-       VIN_DATA_PIN_GROUP(vin4_data, 24, _a),
-       VIN_DATA_PIN_GROUP(vin4_data, 8, _b),
-       VIN_DATA_PIN_GROUP(vin4_data, 10, _b),
-       VIN_DATA_PIN_GROUP(vin4_data, 12, _b),
-       VIN_DATA_PIN_GROUP(vin4_data, 16, _b),
-       SH_PFC_PIN_GROUP(vin4_data18_b),
-       VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
-       VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
-       SH_PFC_PIN_GROUP(vin4_sync),
-       SH_PFC_PIN_GROUP(vin4_field),
-       SH_PFC_PIN_GROUP(vin4_clkenb),
-       SH_PFC_PIN_GROUP(vin4_clk),
-       VIN_DATA_PIN_GROUP(vin5_data, 8),
-       VIN_DATA_PIN_GROUP(vin5_data, 10),
-       VIN_DATA_PIN_GROUP(vin5_data, 12),
-       VIN_DATA_PIN_GROUP(vin5_data, 16),
-       SH_PFC_PIN_GROUP(vin5_sync),
-       SH_PFC_PIN_GROUP(vin5_field),
-       SH_PFC_PIN_GROUP(vin5_clkenb),
-       SH_PFC_PIN_GROUP(vin5_clk),
+static const struct {
+       struct sh_pfc_pin_group common[320];
+       struct sh_pfc_pin_group automotive[30];
+} pinmux_groups = {
+       .common = {
+               SH_PFC_PIN_GROUP(audio_clk_a_a),
+               SH_PFC_PIN_GROUP(audio_clk_a_b),
+               SH_PFC_PIN_GROUP(audio_clk_a_c),
+               SH_PFC_PIN_GROUP(audio_clk_b_a),
+               SH_PFC_PIN_GROUP(audio_clk_b_b),
+               SH_PFC_PIN_GROUP(audio_clk_c_a),
+               SH_PFC_PIN_GROUP(audio_clk_c_b),
+               SH_PFC_PIN_GROUP(audio_clkout_a),
+               SH_PFC_PIN_GROUP(audio_clkout_b),
+               SH_PFC_PIN_GROUP(audio_clkout_c),
+               SH_PFC_PIN_GROUP(audio_clkout_d),
+               SH_PFC_PIN_GROUP(audio_clkout1_a),
+               SH_PFC_PIN_GROUP(audio_clkout1_b),
+               SH_PFC_PIN_GROUP(audio_clkout2_a),
+               SH_PFC_PIN_GROUP(audio_clkout2_b),
+               SH_PFC_PIN_GROUP(audio_clkout3_a),
+               SH_PFC_PIN_GROUP(audio_clkout3_b),
+               SH_PFC_PIN_GROUP(avb_link),
+               SH_PFC_PIN_GROUP(avb_magic),
+               SH_PFC_PIN_GROUP(avb_phy_int),
+               SH_PFC_PIN_GROUP_ALIAS(avb_mdc, avb_mdio),      /* Deprecated */
+               SH_PFC_PIN_GROUP(avb_mdio),
+               SH_PFC_PIN_GROUP(avb_mii),
+               SH_PFC_PIN_GROUP(avb_avtp_pps),
+               SH_PFC_PIN_GROUP(avb_avtp_match_a),
+               SH_PFC_PIN_GROUP(avb_avtp_capture_a),
+               SH_PFC_PIN_GROUP(avb_avtp_match_b),
+               SH_PFC_PIN_GROUP(avb_avtp_capture_b),
+               SH_PFC_PIN_GROUP(can0_data_a),
+               SH_PFC_PIN_GROUP(can0_data_b),
+               SH_PFC_PIN_GROUP(can1_data),
+               SH_PFC_PIN_GROUP(can_clk),
+               SH_PFC_PIN_GROUP(canfd0_data_a),
+               SH_PFC_PIN_GROUP(canfd0_data_b),
+               SH_PFC_PIN_GROUP(canfd1_data),
+               SH_PFC_PIN_GROUP(du_rgb666),
+               SH_PFC_PIN_GROUP(du_rgb888),
+               SH_PFC_PIN_GROUP(du_clk_out_0),
+               SH_PFC_PIN_GROUP(du_clk_out_1),
+               SH_PFC_PIN_GROUP(du_sync),
+               SH_PFC_PIN_GROUP(du_oddf),
+               SH_PFC_PIN_GROUP(du_cde),
+               SH_PFC_PIN_GROUP(du_disp),
+               SH_PFC_PIN_GROUP(hscif0_data),
+               SH_PFC_PIN_GROUP(hscif0_clk),
+               SH_PFC_PIN_GROUP(hscif0_ctrl),
+               SH_PFC_PIN_GROUP(hscif1_data_a),
+               SH_PFC_PIN_GROUP(hscif1_clk_a),
+               SH_PFC_PIN_GROUP(hscif1_ctrl_a),
+               SH_PFC_PIN_GROUP(hscif1_data_b),
+               SH_PFC_PIN_GROUP(hscif1_clk_b),
+               SH_PFC_PIN_GROUP(hscif1_ctrl_b),
+               SH_PFC_PIN_GROUP(hscif2_data_a),
+               SH_PFC_PIN_GROUP(hscif2_clk_a),
+               SH_PFC_PIN_GROUP(hscif2_ctrl_a),
+               SH_PFC_PIN_GROUP(hscif2_data_b),
+               SH_PFC_PIN_GROUP(hscif2_clk_b),
+               SH_PFC_PIN_GROUP(hscif2_ctrl_b),
+               SH_PFC_PIN_GROUP(hscif2_data_c),
+               SH_PFC_PIN_GROUP(hscif2_clk_c),
+               SH_PFC_PIN_GROUP(hscif2_ctrl_c),
+               SH_PFC_PIN_GROUP(hscif3_data_a),
+               SH_PFC_PIN_GROUP(hscif3_clk),
+               SH_PFC_PIN_GROUP(hscif3_ctrl),
+               SH_PFC_PIN_GROUP(hscif3_data_b),
+               SH_PFC_PIN_GROUP(hscif3_data_c),
+               SH_PFC_PIN_GROUP(hscif3_data_d),
+               SH_PFC_PIN_GROUP(hscif4_data_a),
+               SH_PFC_PIN_GROUP(hscif4_clk),
+               SH_PFC_PIN_GROUP(hscif4_ctrl),
+               SH_PFC_PIN_GROUP(hscif4_data_b),
+               SH_PFC_PIN_GROUP(i2c0),
+               SH_PFC_PIN_GROUP(i2c1_a),
+               SH_PFC_PIN_GROUP(i2c1_b),
+               SH_PFC_PIN_GROUP(i2c2_a),
+               SH_PFC_PIN_GROUP(i2c2_b),
+               SH_PFC_PIN_GROUP(i2c3),
+               SH_PFC_PIN_GROUP(i2c5),
+               SH_PFC_PIN_GROUP(i2c6_a),
+               SH_PFC_PIN_GROUP(i2c6_b),
+               SH_PFC_PIN_GROUP(i2c6_c),
+               SH_PFC_PIN_GROUP(intc_ex_irq0),
+               SH_PFC_PIN_GROUP(intc_ex_irq1),
+               SH_PFC_PIN_GROUP(intc_ex_irq2),
+               SH_PFC_PIN_GROUP(intc_ex_irq3),
+               SH_PFC_PIN_GROUP(intc_ex_irq4),
+               SH_PFC_PIN_GROUP(intc_ex_irq5),
+               SH_PFC_PIN_GROUP(msiof0_clk),
+               SH_PFC_PIN_GROUP(msiof0_sync),
+               SH_PFC_PIN_GROUP(msiof0_ss1),
+               SH_PFC_PIN_GROUP(msiof0_ss2),
+               SH_PFC_PIN_GROUP(msiof0_txd),
+               SH_PFC_PIN_GROUP(msiof0_rxd),
+               SH_PFC_PIN_GROUP(msiof1_clk_a),
+               SH_PFC_PIN_GROUP(msiof1_sync_a),
+               SH_PFC_PIN_GROUP(msiof1_ss1_a),
+               SH_PFC_PIN_GROUP(msiof1_ss2_a),
+               SH_PFC_PIN_GROUP(msiof1_txd_a),
+               SH_PFC_PIN_GROUP(msiof1_rxd_a),
+               SH_PFC_PIN_GROUP(msiof1_clk_b),
+               SH_PFC_PIN_GROUP(msiof1_sync_b),
+               SH_PFC_PIN_GROUP(msiof1_ss1_b),
+               SH_PFC_PIN_GROUP(msiof1_ss2_b),
+               SH_PFC_PIN_GROUP(msiof1_txd_b),
+               SH_PFC_PIN_GROUP(msiof1_rxd_b),
+               SH_PFC_PIN_GROUP(msiof1_clk_c),
+               SH_PFC_PIN_GROUP(msiof1_sync_c),
+               SH_PFC_PIN_GROUP(msiof1_ss1_c),
+               SH_PFC_PIN_GROUP(msiof1_ss2_c),
+               SH_PFC_PIN_GROUP(msiof1_txd_c),
+               SH_PFC_PIN_GROUP(msiof1_rxd_c),
+               SH_PFC_PIN_GROUP(msiof1_clk_d),
+               SH_PFC_PIN_GROUP(msiof1_sync_d),
+               SH_PFC_PIN_GROUP(msiof1_ss1_d),
+               SH_PFC_PIN_GROUP(msiof1_ss2_d),
+               SH_PFC_PIN_GROUP(msiof1_txd_d),
+               SH_PFC_PIN_GROUP(msiof1_rxd_d),
+               SH_PFC_PIN_GROUP(msiof1_clk_e),
+               SH_PFC_PIN_GROUP(msiof1_sync_e),
+               SH_PFC_PIN_GROUP(msiof1_ss1_e),
+               SH_PFC_PIN_GROUP(msiof1_ss2_e),
+               SH_PFC_PIN_GROUP(msiof1_txd_e),
+               SH_PFC_PIN_GROUP(msiof1_rxd_e),
+               SH_PFC_PIN_GROUP(msiof1_clk_f),
+               SH_PFC_PIN_GROUP(msiof1_sync_f),
+               SH_PFC_PIN_GROUP(msiof1_ss1_f),
+               SH_PFC_PIN_GROUP(msiof1_ss2_f),
+               SH_PFC_PIN_GROUP(msiof1_txd_f),
+               SH_PFC_PIN_GROUP(msiof1_rxd_f),
+               SH_PFC_PIN_GROUP(msiof1_clk_g),
+               SH_PFC_PIN_GROUP(msiof1_sync_g),
+               SH_PFC_PIN_GROUP(msiof1_ss1_g),
+               SH_PFC_PIN_GROUP(msiof1_ss2_g),
+               SH_PFC_PIN_GROUP(msiof1_txd_g),
+               SH_PFC_PIN_GROUP(msiof1_rxd_g),
+               SH_PFC_PIN_GROUP(msiof2_clk_a),
+               SH_PFC_PIN_GROUP(msiof2_sync_a),
+               SH_PFC_PIN_GROUP(msiof2_ss1_a),
+               SH_PFC_PIN_GROUP(msiof2_ss2_a),
+               SH_PFC_PIN_GROUP(msiof2_txd_a),
+               SH_PFC_PIN_GROUP(msiof2_rxd_a),
+               SH_PFC_PIN_GROUP(msiof2_clk_b),
+               SH_PFC_PIN_GROUP(msiof2_sync_b),
+               SH_PFC_PIN_GROUP(msiof2_ss1_b),
+               SH_PFC_PIN_GROUP(msiof2_ss2_b),
+               SH_PFC_PIN_GROUP(msiof2_txd_b),
+               SH_PFC_PIN_GROUP(msiof2_rxd_b),
+               SH_PFC_PIN_GROUP(msiof2_clk_c),
+               SH_PFC_PIN_GROUP(msiof2_sync_c),
+               SH_PFC_PIN_GROUP(msiof2_ss1_c),
+               SH_PFC_PIN_GROUP(msiof2_ss2_c),
+               SH_PFC_PIN_GROUP(msiof2_txd_c),
+               SH_PFC_PIN_GROUP(msiof2_rxd_c),
+               SH_PFC_PIN_GROUP(msiof2_clk_d),
+               SH_PFC_PIN_GROUP(msiof2_sync_d),
+               SH_PFC_PIN_GROUP(msiof2_ss1_d),
+               SH_PFC_PIN_GROUP(msiof2_ss2_d),
+               SH_PFC_PIN_GROUP(msiof2_txd_d),
+               SH_PFC_PIN_GROUP(msiof2_rxd_d),
+               SH_PFC_PIN_GROUP(msiof3_clk_a),
+               SH_PFC_PIN_GROUP(msiof3_sync_a),
+               SH_PFC_PIN_GROUP(msiof3_ss1_a),
+               SH_PFC_PIN_GROUP(msiof3_ss2_a),
+               SH_PFC_PIN_GROUP(msiof3_txd_a),
+               SH_PFC_PIN_GROUP(msiof3_rxd_a),
+               SH_PFC_PIN_GROUP(msiof3_clk_b),
+               SH_PFC_PIN_GROUP(msiof3_sync_b),
+               SH_PFC_PIN_GROUP(msiof3_ss1_b),
+               SH_PFC_PIN_GROUP(msiof3_ss2_b),
+               SH_PFC_PIN_GROUP(msiof3_txd_b),
+               SH_PFC_PIN_GROUP(msiof3_rxd_b),
+               SH_PFC_PIN_GROUP(msiof3_clk_c),
+               SH_PFC_PIN_GROUP(msiof3_sync_c),
+               SH_PFC_PIN_GROUP(msiof3_txd_c),
+               SH_PFC_PIN_GROUP(msiof3_rxd_c),
+               SH_PFC_PIN_GROUP(msiof3_clk_d),
+               SH_PFC_PIN_GROUP(msiof3_sync_d),
+               SH_PFC_PIN_GROUP(msiof3_ss1_d),
+               SH_PFC_PIN_GROUP(msiof3_txd_d),
+               SH_PFC_PIN_GROUP(msiof3_rxd_d),
+               SH_PFC_PIN_GROUP(msiof3_clk_e),
+               SH_PFC_PIN_GROUP(msiof3_sync_e),
+               SH_PFC_PIN_GROUP(msiof3_ss1_e),
+               SH_PFC_PIN_GROUP(msiof3_ss2_e),
+               SH_PFC_PIN_GROUP(msiof3_txd_e),
+               SH_PFC_PIN_GROUP(msiof3_rxd_e),
+               SH_PFC_PIN_GROUP(pwm0),
+               SH_PFC_PIN_GROUP(pwm1_a),
+               SH_PFC_PIN_GROUP(pwm1_b),
+               SH_PFC_PIN_GROUP(pwm2_a),
+               SH_PFC_PIN_GROUP(pwm2_b),
+               SH_PFC_PIN_GROUP(pwm3_a),
+               SH_PFC_PIN_GROUP(pwm3_b),
+               SH_PFC_PIN_GROUP(pwm4_a),
+               SH_PFC_PIN_GROUP(pwm4_b),
+               SH_PFC_PIN_GROUP(pwm5_a),
+               SH_PFC_PIN_GROUP(pwm5_b),
+               SH_PFC_PIN_GROUP(pwm6_a),
+               SH_PFC_PIN_GROUP(pwm6_b),
+               SH_PFC_PIN_GROUP(sata0_devslp_a),
+               SH_PFC_PIN_GROUP(sata0_devslp_b),
+               SH_PFC_PIN_GROUP(scif0_data),
+               SH_PFC_PIN_GROUP(scif0_clk),
+               SH_PFC_PIN_GROUP(scif0_ctrl),
+               SH_PFC_PIN_GROUP(scif1_data_a),
+               SH_PFC_PIN_GROUP(scif1_clk),
+               SH_PFC_PIN_GROUP(scif1_ctrl),
+               SH_PFC_PIN_GROUP(scif1_data_b),
+               SH_PFC_PIN_GROUP(scif2_data_a),
+               SH_PFC_PIN_GROUP(scif2_clk),
+               SH_PFC_PIN_GROUP(scif2_data_b),
+               SH_PFC_PIN_GROUP(scif3_data_a),
+               SH_PFC_PIN_GROUP(scif3_clk),
+               SH_PFC_PIN_GROUP(scif3_ctrl),
+               SH_PFC_PIN_GROUP(scif3_data_b),
+               SH_PFC_PIN_GROUP(scif4_data_a),
+               SH_PFC_PIN_GROUP(scif4_clk_a),
+               SH_PFC_PIN_GROUP(scif4_ctrl_a),
+               SH_PFC_PIN_GROUP(scif4_data_b),
+               SH_PFC_PIN_GROUP(scif4_clk_b),
+               SH_PFC_PIN_GROUP(scif4_ctrl_b),
+               SH_PFC_PIN_GROUP(scif4_data_c),
+               SH_PFC_PIN_GROUP(scif4_clk_c),
+               SH_PFC_PIN_GROUP(scif4_ctrl_c),
+               SH_PFC_PIN_GROUP(scif5_data_a),
+               SH_PFC_PIN_GROUP(scif5_clk_a),
+               SH_PFC_PIN_GROUP(scif5_data_b),
+               SH_PFC_PIN_GROUP(scif5_clk_b),
+               SH_PFC_PIN_GROUP(scif_clk_a),
+               SH_PFC_PIN_GROUP(scif_clk_b),
+               SH_PFC_PIN_GROUP(sdhi0_data1),
+               SH_PFC_PIN_GROUP(sdhi0_data4),
+               SH_PFC_PIN_GROUP(sdhi0_ctrl),
+               SH_PFC_PIN_GROUP(sdhi0_cd),
+               SH_PFC_PIN_GROUP(sdhi0_wp),
+               SH_PFC_PIN_GROUP(sdhi1_data1),
+               SH_PFC_PIN_GROUP(sdhi1_data4),
+               SH_PFC_PIN_GROUP(sdhi1_ctrl),
+               SH_PFC_PIN_GROUP(sdhi1_cd),
+               SH_PFC_PIN_GROUP(sdhi1_wp),
+               SH_PFC_PIN_GROUP(sdhi2_data1),
+               SH_PFC_PIN_GROUP(sdhi2_data4),
+               SH_PFC_PIN_GROUP(sdhi2_data8),
+               SH_PFC_PIN_GROUP(sdhi2_ctrl),
+               SH_PFC_PIN_GROUP(sdhi2_cd_a),
+               SH_PFC_PIN_GROUP(sdhi2_wp_a),
+               SH_PFC_PIN_GROUP(sdhi2_cd_b),
+               SH_PFC_PIN_GROUP(sdhi2_wp_b),
+               SH_PFC_PIN_GROUP(sdhi2_ds),
+               SH_PFC_PIN_GROUP(sdhi3_data1),
+               SH_PFC_PIN_GROUP(sdhi3_data4),
+               SH_PFC_PIN_GROUP(sdhi3_data8),
+               SH_PFC_PIN_GROUP(sdhi3_ctrl),
+               SH_PFC_PIN_GROUP(sdhi3_cd),
+               SH_PFC_PIN_GROUP(sdhi3_wp),
+               SH_PFC_PIN_GROUP(sdhi3_ds),
+               SH_PFC_PIN_GROUP(ssi0_data),
+               SH_PFC_PIN_GROUP(ssi01239_ctrl),
+               SH_PFC_PIN_GROUP(ssi1_data_a),
+               SH_PFC_PIN_GROUP(ssi1_data_b),
+               SH_PFC_PIN_GROUP(ssi1_ctrl_a),
+               SH_PFC_PIN_GROUP(ssi1_ctrl_b),
+               SH_PFC_PIN_GROUP(ssi2_data_a),
+               SH_PFC_PIN_GROUP(ssi2_data_b),
+               SH_PFC_PIN_GROUP(ssi2_ctrl_a),
+               SH_PFC_PIN_GROUP(ssi2_ctrl_b),
+               SH_PFC_PIN_GROUP(ssi3_data),
+               SH_PFC_PIN_GROUP(ssi349_ctrl),
+               SH_PFC_PIN_GROUP(ssi4_data),
+               SH_PFC_PIN_GROUP(ssi4_ctrl),
+               SH_PFC_PIN_GROUP(ssi5_data),
+               SH_PFC_PIN_GROUP(ssi5_ctrl),
+               SH_PFC_PIN_GROUP(ssi6_data),
+               SH_PFC_PIN_GROUP(ssi6_ctrl),
+               SH_PFC_PIN_GROUP(ssi7_data),
+               SH_PFC_PIN_GROUP(ssi78_ctrl),
+               SH_PFC_PIN_GROUP(ssi8_data),
+               SH_PFC_PIN_GROUP(ssi9_data_a),
+               SH_PFC_PIN_GROUP(ssi9_data_b),
+               SH_PFC_PIN_GROUP(ssi9_ctrl_a),
+               SH_PFC_PIN_GROUP(ssi9_ctrl_b),
+               SH_PFC_PIN_GROUP(tmu_tclk1_a),
+               SH_PFC_PIN_GROUP(tmu_tclk1_b),
+               SH_PFC_PIN_GROUP(tmu_tclk2_a),
+               SH_PFC_PIN_GROUP(tmu_tclk2_b),
+               SH_PFC_PIN_GROUP(tpu_to0),
+               SH_PFC_PIN_GROUP(tpu_to1),
+               SH_PFC_PIN_GROUP(tpu_to2),
+               SH_PFC_PIN_GROUP(tpu_to3),
+               SH_PFC_PIN_GROUP(usb0),
+               SH_PFC_PIN_GROUP(usb1),
+               SH_PFC_PIN_GROUP(usb2),
+               SH_PFC_PIN_GROUP(usb2_ch3),
+               SH_PFC_PIN_GROUP(usb30),
+               VIN_DATA_PIN_GROUP(vin4_data, 8, _a),
+               VIN_DATA_PIN_GROUP(vin4_data, 10, _a),
+               VIN_DATA_PIN_GROUP(vin4_data, 12, _a),
+               VIN_DATA_PIN_GROUP(vin4_data, 16, _a),
+               SH_PFC_PIN_GROUP(vin4_data18_a),
+               VIN_DATA_PIN_GROUP(vin4_data, 20, _a),
+               VIN_DATA_PIN_GROUP(vin4_data, 24, _a),
+               VIN_DATA_PIN_GROUP(vin4_data, 8, _b),
+               VIN_DATA_PIN_GROUP(vin4_data, 10, _b),
+               VIN_DATA_PIN_GROUP(vin4_data, 12, _b),
+               VIN_DATA_PIN_GROUP(vin4_data, 16, _b),
+               SH_PFC_PIN_GROUP(vin4_data18_b),
+               VIN_DATA_PIN_GROUP(vin4_data, 20, _b),
+               VIN_DATA_PIN_GROUP(vin4_data, 24, _b),
+               SH_PFC_PIN_GROUP(vin4_sync),
+               SH_PFC_PIN_GROUP(vin4_field),
+               SH_PFC_PIN_GROUP(vin4_clkenb),
+               SH_PFC_PIN_GROUP(vin4_clk),
+               VIN_DATA_PIN_GROUP(vin5_data, 8),
+               VIN_DATA_PIN_GROUP(vin5_data, 10),
+               VIN_DATA_PIN_GROUP(vin5_data, 12),
+               VIN_DATA_PIN_GROUP(vin5_data, 16),
+               SH_PFC_PIN_GROUP(vin5_sync),
+               SH_PFC_PIN_GROUP(vin5_field),
+               SH_PFC_PIN_GROUP(vin5_clkenb),
+               SH_PFC_PIN_GROUP(vin5_clk),
+       },
+       .automotive = {
+               SH_PFC_PIN_GROUP(drif0_ctrl_a),
+               SH_PFC_PIN_GROUP(drif0_data0_a),
+               SH_PFC_PIN_GROUP(drif0_data1_a),
+               SH_PFC_PIN_GROUP(drif0_ctrl_b),
+               SH_PFC_PIN_GROUP(drif0_data0_b),
+               SH_PFC_PIN_GROUP(drif0_data1_b),
+               SH_PFC_PIN_GROUP(drif0_ctrl_c),
+               SH_PFC_PIN_GROUP(drif0_data0_c),
+               SH_PFC_PIN_GROUP(drif0_data1_c),
+               SH_PFC_PIN_GROUP(drif1_ctrl_a),
+               SH_PFC_PIN_GROUP(drif1_data0_a),
+               SH_PFC_PIN_GROUP(drif1_data1_a),
+               SH_PFC_PIN_GROUP(drif1_ctrl_b),
+               SH_PFC_PIN_GROUP(drif1_data0_b),
+               SH_PFC_PIN_GROUP(drif1_data1_b),
+               SH_PFC_PIN_GROUP(drif1_ctrl_c),
+               SH_PFC_PIN_GROUP(drif1_data0_c),
+               SH_PFC_PIN_GROUP(drif1_data1_c),
+               SH_PFC_PIN_GROUP(drif2_ctrl_a),
+               SH_PFC_PIN_GROUP(drif2_data0_a),
+               SH_PFC_PIN_GROUP(drif2_data1_a),
+               SH_PFC_PIN_GROUP(drif2_ctrl_b),
+               SH_PFC_PIN_GROUP(drif2_data0_b),
+               SH_PFC_PIN_GROUP(drif2_data1_b),
+               SH_PFC_PIN_GROUP(drif3_ctrl_a),
+               SH_PFC_PIN_GROUP(drif3_data0_a),
+               SH_PFC_PIN_GROUP(drif3_data1_a),
+               SH_PFC_PIN_GROUP(drif3_ctrl_b),
+               SH_PFC_PIN_GROUP(drif3_data0_b),
+               SH_PFC_PIN_GROUP(drif3_data1_b),
+       }
+
 };
 
 static const char * const audio_clk_groups[] = {
@@ -4947,6 +4989,13 @@ static const char * const tmu_groups[] = {
        "tmu_tclk2_b",
 };
 
+static const char * const tpu_groups[] = {
+       "tpu_to0",
+       "tpu_to1",
+       "tpu_to2",
+       "tpu_to3",
+};
+
 static const char * const usb0_groups[] = {
        "usb0",
 };
@@ -4999,63 +5048,72 @@ static const char * const vin5_groups[] = {
        "vin5_clk",
 };
 
-static const struct sh_pfc_function pinmux_functions[] = {
-       SH_PFC_FUNCTION(audio_clk),
-       SH_PFC_FUNCTION(avb),
-       SH_PFC_FUNCTION(can0),
-       SH_PFC_FUNCTION(can1),
-       SH_PFC_FUNCTION(can_clk),
-       SH_PFC_FUNCTION(canfd0),
-       SH_PFC_FUNCTION(canfd1),
-       SH_PFC_FUNCTION(drif0),
-       SH_PFC_FUNCTION(drif1),
-       SH_PFC_FUNCTION(drif2),
-       SH_PFC_FUNCTION(drif3),
-       SH_PFC_FUNCTION(du),
-       SH_PFC_FUNCTION(hscif0),
-       SH_PFC_FUNCTION(hscif1),
-       SH_PFC_FUNCTION(hscif2),
-       SH_PFC_FUNCTION(hscif3),
-       SH_PFC_FUNCTION(hscif4),
-       SH_PFC_FUNCTION(i2c0),
-       SH_PFC_FUNCTION(i2c1),
-       SH_PFC_FUNCTION(i2c2),
-       SH_PFC_FUNCTION(i2c3),
-       SH_PFC_FUNCTION(i2c5),
-       SH_PFC_FUNCTION(i2c6),
-       SH_PFC_FUNCTION(intc_ex),
-       SH_PFC_FUNCTION(msiof0),
-       SH_PFC_FUNCTION(msiof1),
-       SH_PFC_FUNCTION(msiof2),
-       SH_PFC_FUNCTION(msiof3),
-       SH_PFC_FUNCTION(pwm0),
-       SH_PFC_FUNCTION(pwm1),
-       SH_PFC_FUNCTION(pwm2),
-       SH_PFC_FUNCTION(pwm3),
-       SH_PFC_FUNCTION(pwm4),
-       SH_PFC_FUNCTION(pwm5),
-       SH_PFC_FUNCTION(pwm6),
-       SH_PFC_FUNCTION(sata0),
-       SH_PFC_FUNCTION(scif0),
-       SH_PFC_FUNCTION(scif1),
-       SH_PFC_FUNCTION(scif2),
-       SH_PFC_FUNCTION(scif3),
-       SH_PFC_FUNCTION(scif4),
-       SH_PFC_FUNCTION(scif5),
-       SH_PFC_FUNCTION(scif_clk),
-       SH_PFC_FUNCTION(sdhi0),
-       SH_PFC_FUNCTION(sdhi1),
-       SH_PFC_FUNCTION(sdhi2),
-       SH_PFC_FUNCTION(sdhi3),
-       SH_PFC_FUNCTION(ssi),
-       SH_PFC_FUNCTION(tmu),
-       SH_PFC_FUNCTION(usb0),
-       SH_PFC_FUNCTION(usb1),
-       SH_PFC_FUNCTION(usb2),
-       SH_PFC_FUNCTION(usb2_ch3),
-       SH_PFC_FUNCTION(usb30),
-       SH_PFC_FUNCTION(vin4),
-       SH_PFC_FUNCTION(vin5),
+static const struct {
+       struct sh_pfc_function common[53];
+       struct sh_pfc_function automotive[4];
+} pinmux_functions = {
+       .common = {
+               SH_PFC_FUNCTION(audio_clk),
+               SH_PFC_FUNCTION(avb),
+               SH_PFC_FUNCTION(can0),
+               SH_PFC_FUNCTION(can1),
+               SH_PFC_FUNCTION(can_clk),
+               SH_PFC_FUNCTION(canfd0),
+               SH_PFC_FUNCTION(canfd1),
+               SH_PFC_FUNCTION(du),
+               SH_PFC_FUNCTION(hscif0),
+               SH_PFC_FUNCTION(hscif1),
+               SH_PFC_FUNCTION(hscif2),
+               SH_PFC_FUNCTION(hscif3),
+               SH_PFC_FUNCTION(hscif4),
+               SH_PFC_FUNCTION(i2c0),
+               SH_PFC_FUNCTION(i2c1),
+               SH_PFC_FUNCTION(i2c2),
+               SH_PFC_FUNCTION(i2c3),
+               SH_PFC_FUNCTION(i2c5),
+               SH_PFC_FUNCTION(i2c6),
+               SH_PFC_FUNCTION(intc_ex),
+               SH_PFC_FUNCTION(msiof0),
+               SH_PFC_FUNCTION(msiof1),
+               SH_PFC_FUNCTION(msiof2),
+               SH_PFC_FUNCTION(msiof3),
+               SH_PFC_FUNCTION(pwm0),
+               SH_PFC_FUNCTION(pwm1),
+               SH_PFC_FUNCTION(pwm2),
+               SH_PFC_FUNCTION(pwm3),
+               SH_PFC_FUNCTION(pwm4),
+               SH_PFC_FUNCTION(pwm5),
+               SH_PFC_FUNCTION(pwm6),
+               SH_PFC_FUNCTION(sata0),
+               SH_PFC_FUNCTION(scif0),
+               SH_PFC_FUNCTION(scif1),
+               SH_PFC_FUNCTION(scif2),
+               SH_PFC_FUNCTION(scif3),
+               SH_PFC_FUNCTION(scif4),
+               SH_PFC_FUNCTION(scif5),
+               SH_PFC_FUNCTION(scif_clk),
+               SH_PFC_FUNCTION(sdhi0),
+               SH_PFC_FUNCTION(sdhi1),
+               SH_PFC_FUNCTION(sdhi2),
+               SH_PFC_FUNCTION(sdhi3),
+               SH_PFC_FUNCTION(ssi),
+               SH_PFC_FUNCTION(tmu),
+               SH_PFC_FUNCTION(tpu),
+               SH_PFC_FUNCTION(usb0),
+               SH_PFC_FUNCTION(usb1),
+               SH_PFC_FUNCTION(usb2),
+               SH_PFC_FUNCTION(usb2_ch3),
+               SH_PFC_FUNCTION(usb30),
+               SH_PFC_FUNCTION(vin4),
+               SH_PFC_FUNCTION(vin5),
+       },
+       .automotive = {
+               SH_PFC_FUNCTION(drif0),
+               SH_PFC_FUNCTION(drif1),
+               SH_PFC_FUNCTION(drif2),
+               SH_PFC_FUNCTION(drif3),
+       }
+
 };
 
 static const struct pinmux_cfg_reg pinmux_config_regs[] = {
@@ -6186,6 +6244,32 @@ static const struct sh_pfc_soc_operations r8a7795_pinmux_ops = {
        .set_bias = r8a7795_pinmux_set_bias,
 };
 
+#ifdef CONFIG_PINCTRL_PFC_R8A774E1
+const struct sh_pfc_soc_info r8a774e1_pinmux_info = {
+       .name = "r8a774e1_pfc",
+       .ops = &r8a7795_pinmux_ops,
+       .unlock_reg = 0xe6060000, /* PMMR */
+
+       .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
+
+       .pins = pinmux_pins,
+       .nr_pins = ARRAY_SIZE(pinmux_pins),
+       .groups = pinmux_groups.common,
+       .nr_groups = ARRAY_SIZE(pinmux_groups.common),
+       .functions = pinmux_functions.common,
+       .nr_functions = ARRAY_SIZE(pinmux_functions.common),
+
+       .cfg_regs = pinmux_config_regs,
+       .drive_regs = pinmux_drive_regs,
+       .bias_regs = pinmux_bias_regs,
+       .ioctrl_regs = pinmux_ioctrl_regs,
+
+       .pinmux_data = pinmux_data,
+       .pinmux_data_size = ARRAY_SIZE(pinmux_data),
+};
+#endif
+
+#ifdef CONFIG_PINCTRL_PFC_R8A7795
 const struct sh_pfc_soc_info r8a7795_pinmux_info = {
        .name = "r8a77951_pfc",
        .ops = &r8a7795_pinmux_ops,
@@ -6195,10 +6279,12 @@ const struct sh_pfc_soc_info r8a7795_pinmux_info = {
 
        .pins = pinmux_pins,
        .nr_pins = ARRAY_SIZE(pinmux_pins),
-       .groups = pinmux_groups,
-       .nr_groups = ARRAY_SIZE(pinmux_groups),
-       .functions = pinmux_functions,
-       .nr_functions = ARRAY_SIZE(pinmux_functions),
+       .groups = pinmux_groups.common,
+       .nr_groups = ARRAY_SIZE(pinmux_groups.common) +
+                       ARRAY_SIZE(pinmux_groups.automotive),
+       .functions = pinmux_functions.common,
+       .nr_functions = ARRAY_SIZE(pinmux_functions.common) +
+                       ARRAY_SIZE(pinmux_functions.automotive),
 
        .cfg_regs = pinmux_config_regs,
        .drive_regs = pinmux_drive_regs,
@@ -6208,3 +6294,4 @@ const struct sh_pfc_soc_info r8a7795_pinmux_info = {
        .pinmux_data = pinmux_data,
        .pinmux_data_size = ARRAY_SIZE(pinmux_data),
 };
+#endif

diff --git a/drivers/pinctrl/renesas/pfc.c b/drivers/pinctrl/renesas/pfc.c
index 568ed3e7df23bf22c88a804223b7774b66714c75..db0fa9b728b7ddbea0f3380af8593bd39a9229a0 100644 (file)
--- a/drivers/pinctrl/renesas/pfc.c
+++ b/drivers/pinctrl/renesas/pfc.c
@@ -34,6 +34,7 @@ enum sh_pfc_model {
        SH_PFC_R8A7796,
        SH_PFC_R8A774A1,
        SH_PFC_R8A774B1,
+       SH_PFC_R8A774E1,
        SH_PFC_R8A77965,
        SH_PFC_R8A77970,
        SH_PFC_R8A77980,
@@ -863,6 +864,10 @@ static int sh_pfc_pinctrl_probe(struct udevice *dev)
        if (model == SH_PFC_R8A774B1)
                priv->pfc.info = &r8a774b1_pinmux_info;
 #endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774E1
+       if (model == SH_PFC_R8A774E1)
+               priv->pfc.info = &r8a774e1_pinmux_info;
+#endif
 #ifdef CONFIG_PINCTRL_PFC_R8A77965
        if (model == SH_PFC_R8A77965)
                priv->pfc.info = &r8a77965_pinmux_info;
@@ -946,6 +951,12 @@ static const struct udevice_id sh_pfc_pinctrl_ids[] = {
                .data = SH_PFC_R8A774B1,
        },
 #endif
+#ifdef CONFIG_PINCTRL_PFC_R8A774E1
+       {
+               .compatible = "renesas,pfc-r8a774e1",
+               .data = SH_PFC_R8A774E1,
+       },
+#endif
 #ifdef CONFIG_PINCTRL_PFC_R8A77965
        {
                .compatible = "renesas,pfc-r8a77965",

diff --git a/drivers/pinctrl/renesas/sh_pfc.h b/drivers/pinctrl/renesas/sh_pfc.h
index f5cf31d26fe342f127d5a7db6013b10818f99579..22cc860f2961d0c31fbcdccdf6d3ebd17c2c5d2c 100644 (file)
--- a/drivers/pinctrl/renesas/sh_pfc.h
+++ b/drivers/pinctrl/renesas/sh_pfc.h
@@ -295,6 +295,7 @@ sh_pfc_pin_to_bias_reg(const struct sh_pfc *pfc, unsigned int pin,
 
 extern const struct sh_pfc_soc_info r8a774a1_pinmux_info;
 extern const struct sh_pfc_soc_info r8a774b1_pinmux_info;
+extern const struct sh_pfc_soc_info r8a774e1_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7790_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7791_pinmux_info;
 extern const struct sh_pfc_soc_info r8a7792_pinmux_info;