Convert CONFIG_SYS_SRIO et al to Kconfig

This converts the following to Kconfig:
   CONFIG_SRIO1
   CONFIG_SRIO2
   CONFIG_SRIO_PCIE_BOOT_MASTER
   CONFIG_SYS_SRIO

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/README b/README
index b095937121b7b42e4d7cef799397824fbb1b1de9..bb35a895b755c7b482822508078707b9c093f819 100644 (file)
--- a/README
+++ b/README
@@ -1686,18 +1686,6 @@ Low Level (hardware related) configuration options:
 - CONFIG_SYS_OR_TIMING_SDRAM:
                SDRAM timing
 
-- CONFIG_SYS_SRIO:
-               Chip has SRIO or not
-
-- CONFIG_SRIO1:
-               Board has SRIO 1 port available
-
-- CONFIG_SRIO2:
-               Board has SRIO 2 port available
-
-- CONFIG_SRIO_PCIE_BOOT_MASTER
-               Board can support master function for Boot from SRIO and PCIE
-
 - CONFIG_SYS_SRIOn_MEM_VIRT:
                Virtual Address of SRIO port 'n' memory region
 

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index c355a954537ddb416188e1259a9805b8343eaea1..cf93a7b1dad00064fed01bbebe5468f3bb3b4178 100644 (file)
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -44,6 +44,21 @@ config SYS_INIT_RAM_LOCK
        bool "Lock some portion of L1 for initial ram stack"
        depends on MPC83xx || MPC85xx
 
+config SYS_SRIO
+       bool "Serial RapidIO support"
+
+config SRIO1
+       bool "Board has SRIO 1 port available"
+       depends on SYS_SRIO
+
+config SRIO2
+       bool "Board has SRIO 2 port available"
+       depends on SYS_SRIO
+
+config SRIO_PCIE_BOOT_MASTER
+       bool "Board can support master function for Boot from SRIO and PCIE"
+       depends on SYS_SRIO
+
 source "arch/powerpc/cpu/mpc83xx/Kconfig"
 source "arch/powerpc/cpu/mpc85xx/Kconfig"
 source "arch/powerpc/cpu/mpc8xx/Kconfig"

diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig
index 85b055a93ffe32effefc56152a28fe0bda2f7278..86a67d7b21fb0fc9a73cb5a545d62d4ff2b264b2 100644 (file)
--- a/configs/MPC8548CDS_36BIT_defconfig
+++ b/configs/MPC8548CDS_36BIT_defconfig
@@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds_36b"
 CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y

diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig
index 0d21b893d8bb654df9796eaad9b363de138aec25..2ac4f266850ef68e4f5620190a582b9b3e3e3b3d 100644 (file)
--- a/configs/MPC8548CDS_defconfig
+++ b/configs/MPC8548CDS_defconfig
@@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
 CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y

diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig
index b01919ec675ac0adb87ee8d6090e823b951fc4e1..faabd7bc045ad326c12289f92738c37981e1de30 100644 (file)
--- a/configs/MPC8548CDS_legacy_defconfig
+++ b/configs/MPC8548CDS_legacy_defconfig
@@ -8,6 +8,8 @@ CONFIG_DEFAULT_DEVICE_TREE="mpc8548cds"
 CONFIG_ENV_ADDR=0xFFF60000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
 # CONFIG_CMD_ERRATA is not set
 CONFIG_TARGET_MPC8548CDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y

diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 0eec5089332d694d1525a3fea496e838b4138432..3d24b1a78c10ada57cbf956e24b8d92f00a4928c 100644 (file)
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -6,6 +6,10 @@ CONFIG_ENV_OFFSET=0xE0000
 CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y

diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index f9f4c31ddb6c8d1af8d0a44ecc756a37543bcd75..cec55a1412b66f676b72f1a181fa0cbe87d1836d 100644 (file)
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -6,6 +6,10 @@ CONFIG_ENV_OFFSET=0xCF400
 CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y

diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index 6a974370088cd01d3327f4c28414785c78de15d6..5fcf1546423b8935912e3a4c4a293b6767fedbdb 100644 (file)
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -7,6 +7,10 @@ CONFIG_ENV_SECT_SIZE=0x10000
 CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y

diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index 1725a8a5a9cc5cc6b5487fe868a21315e9d781d1..ce198e28cb8623f2bc19a2dc5cf464be29394140 100644 (file)
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -7,6 +7,10 @@ CONFIG_DEFAULT_DEVICE_TREE="p2041rdb"
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_P2041RDB=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y

diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index dd7473ef7fd7d64cd9d88e5452cd190ae784e279..637842cda21dfb53e78084b84759902875827423 100644 (file)
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -11,6 +11,10 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y

diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 364aab584778e48b814e7bc77c6e77752a2dfafc..35ab9931e7102b0934ae5f1a9f8d97d42de1a231 100644 (file)
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -12,6 +12,10 @@ CONFIG_SPL_DRIVERS_MISC=y
 CONFIG_SPL=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y

diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index c6710a0413c3340cb21590fb4d187f7e660cf3f3..93b02a5e990258515788576f7a5696c8dd24c5ff 100644 (file)
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -4,6 +4,10 @@ CONFIG_ENV_SIZE=0x2000
 CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y

diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index a705542eea708a8a90fd61704950db8d1ad416ee..7d25bbbb0ba6d4b2f7e526cb80745c3db95595b5 100644 (file)
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -14,6 +14,10 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y
 CONFIG_SPL_SPI=y
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_ENABLE_36BIT_PHYS=y
 CONFIG_SYS_BOOK3E_HV=y

diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index d6d6ec0fbf0d5f6334acb9a33ab4c3a3d23ff396..2846f63d47f014045b6c6b6d7992aa8098452c5e 100644 (file)
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -5,6 +5,10 @@ CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_ENV_ADDR=0xFFE20000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y

diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index 802213de2b9e65242c41a22a9a3e7cb0efb8c3b2..a7dc88c0bf9d27f790c821dcdee65451bbb9f0d2 100644 (file)
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -6,6 +6,10 @@ CONFIG_DEFAULT_DEVICE_TREE="t2080qds"
 CONFIG_ENV_ADDR=0xEFF20000
 CONFIG_MPC85xx=y
 CONFIG_SYS_INIT_RAM_LOCK=y
+CONFIG_SYS_SRIO=y
+CONFIG_SRIO1=y
+CONFIG_SRIO2=y
+CONFIG_SRIO_PCIE_BOOT_MASTER=y
 CONFIG_TARGET_T2080QDS=y
 CONFIG_MPC85XX_HAVE_RESET_VECTOR=y
 CONFIG_ENABLE_36BIT_PHYS=y

diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 6a51149a94949f0ee2957f8f43e5e8551e5e7787..eb75f8b37d5f9278ffaca81fced41fcf4f9129c0 100644 (file)
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -13,9 +13,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_SRIO
-#define CONFIG_SRIO1                   /* SRIO port 1 */
-
 #define CONFIG_INTERRUPTS              /* enable pci, srio, ddr interrupts */
 
 #ifndef __ASSEMBLY__

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index d7e06d23ec4591530338bf4862476ad6742b536f..be8d09f6dd75d78a50767e307d80dea283686b2b 100644 (file)
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -32,11 +32,6 @@
 
 #define CFG_SYS_NUM_CPC                CONFIG_SYS_NUM_DDR_CTLRS
 
-#define CONFIG_SYS_SRIO
-#define CONFIG_SRIO1                   /* SRIO port 1 */
-#define CONFIG_SRIO2                   /* SRIO port 2 */
-#define CONFIG_SRIO_PCIE_BOOT_MASTER
-
 #ifndef __ASSEMBLY__
 #include <linux/stringify.h>
 #endif

diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index 616387f487692ad02fd94f59aebeb22a66f52130..f9f9318448b20f7bc2ea69d78b8bf6ec03275449 100644 (file)
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -49,8 +49,6 @@
 #define CONFIG_RESET_VECTOR_ADDRESS    0xeffffffc
 #endif
 
-/* PCIe Boot - Master */
-#define CONFIG_SRIO_PCIE_BOOT_MASTER
 /*
  * for slave u-boot IMAGE instored in master memory space,
  * PHYS must be aligned based on the SIZE

diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 8f56de40ce8f846cc95f0d865cb390fe4d155668..acaad1bfc827d55e2e3729e378a39db7a2359300 100644 (file)
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -14,11 +14,6 @@
 #include <linux/stringify.h>
 
 #define CONFIG_ICS307_REFCLK_HZ 25000000  /* ICS307 ref clk freq */
-#if defined(CONFIG_ARCH_T2080)
-#define CONFIG_SYS_SRIO                /* Enable Serial RapidIO Support */
-#define CONFIG_SRIO1           /* SRIO port 1 */
-#define CONFIG_SRIO2           /* SRIO port 2 */
-#endif
 
 /* High Level Configuration Options */
 
@@ -52,7 +47,6 @@
 
 #endif /* CONFIG_RAMBOOT_PBL */
 
-#define CONFIG_SRIO_PCIE_BOOT_MASTER
 #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
 /* Set 1M boot space */
 #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)

diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index e9db4a224f90ff622ff3816b317a3a56feab5549..7315afa39f81b90be967bf60c404a540bbd65ede 100644 (file)
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -47,7 +47,6 @@
 
 #endif /* CONFIG_RAMBOOT_PBL */
 
-#define CONFIG_SRIO_PCIE_BOOT_MASTER
 #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE
 /* Set 1M boot space */
 #define CONFIG_SYS_SRIO_PCIE_BOOT_SLAVE_ADDR (CONFIG_TEXT_BASE & 0xfff00000)