Fix gcc issues in pxa-regs.h

Fix gcc4 issue. With some toolchain, a previous patch that fixes gcc4
issues generates wrong code.
(Problem was reported with gcc-4.0.2-glibc-2.3.6/arm-softfloat-linux-gnu).
This patch fixes the problem and solves the gcc-4 issues as the linux
kernel does.

Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Dmitry Ivanov <ivadmitry@gmail.com>

diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index 9b4da3ae9437246b8dc635ccdfd7209432e6001b..e0145688ebedb715daf037f0f9551505b4a041be 100644 (file)
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1288,15 +1288,15 @@ typedef void            (*ExcpHndlr) (void) ;
 #define _GEDR(x)       __REG2(0x40E00048, ((x) & 0x60) >> 3)
 #define _GAFR(x)       __REG2(0x40E00054, ((x) & 0x70) >> 2)
 
-#define GPLR(x)                __REG2(0x40E00000 + (((x) & 0x7f) < 96) ?  0:0x100, ((x) & 0x60) >> 3)
-#define GPDR(x)                __REG2(0x40E0000C + (((x) & 0x7f) < 96) ?  0:0x100, ((x) & 0x60) >> 3)
-#define GPSR(x)                __REG2(0x40E00018 + (((x) & 0x7f) < 96) ?  0:0x100, ((x) & 0x60) >> 3)
-#define GPCR(x)                __REG2(0x40E00024 + (((x) & 0x7f) < 96) ?  0:0x100, ((x) & 0x60) >> 3)
-#define GRER(x)                __REG2(0x40E00030 + (((x) & 0x7f) < 96) ?  0:0x100, ((x) & 0x60) >> 3)
-#define GFER(x)                __REG2(0x40E0003C + (((x) & 0x7f) < 96) ?  0:0x100, ((x) & 0x60) >> 3)
-#define GEDR(x)                __REG2(0x40E00048 + (((x) & 0x7f) < 96) ?  0:0x100, ((x) & 0x60) >> 3)
-#define GAFR(x)                __REG2((((x) & 0x7f) < 96) ?  0x40E00054 : \
-                        ((((x) & 0x7f) < 112) ? 0x40E0006C : 0x40E00070),((x) & 0x60) >> 3)
+#define GPLR(x)                (*((((x) & 0x7f) < 96) ? &_GPLR(x) : &GPLR3))
+#define GPDR(x)                (*((((x) & 0x7f) < 96) ? &_GPDR(x) : &GPDR3))
+#define GPSR(x)                (*((((x) & 0x7f) < 96) ? &_GPSR(x) : &GPSR3))
+#define GPCR(x)                (*((((x) & 0x7f) < 96) ? &_GPCR(x) : &GPCR3))
+#define GRER(x)                (*((((x) & 0x7f) < 96) ? &_GRER(x) : &GRER3))
+#define GFER(x)                (*((((x) & 0x7f) < 96) ? &_GFER(x) : &GFER3))
+#define GEDR(x)                (*((((x) & 0x7f) < 96) ? &_GEDR(x) : &GEDR3))
+#define GAFR(x)                (*((((x) & 0x7f) < 96) ? &_GAFR(x) : \
+                       ((((x) & 0x7f) < 112) ? &GAFR3_L : &GAFR3_U)))
 #else
 
 #define GPLR(x)                __REG2(0x40E00000, ((x) & 0x60) >> 3)