arm: mach-snapdragon: add pinctrl driver for db820c

Add pinctrl driver for Dragonboard820c, currently with only
one mux func to initialize pins for serial console.

Signed-off-by: Ramon Fried <ramon.fried@gmail.com>

diff --git a/arch/arm/mach-snapdragon/Makefile b/arch/arm/mach-snapdragon/Makefile
index 2d9408360021e9e8ca44de3d155fc0e17ab153ab..709919fce4c125b492eaa0d79fa39c4f29d563d8 100644 (file)
--- a/arch/arm/mach-snapdragon/Makefile
+++ b/arch/arm/mach-snapdragon/Makefile
@@ -6,8 +6,9 @@ obj-$(CONFIG_TARGET_DRAGONBOARD820C) += clock-apq8096.o
 obj-$(CONFIG_TARGET_DRAGONBOARD820C) += sysmap-apq8096.o
 obj-$(CONFIG_TARGET_DRAGONBOARD410C) += clock-apq8016.o
 obj-$(CONFIG_TARGET_DRAGONBOARD410C) += sysmap-apq8016.o
-obj-$(CONFIG_TARGET_DRAGONBOARD410C) += pinctrl-apq8016.o
-obj-$(CONFIG_TARGET_DRAGONBOARD410C) += pinctrl-snapdragon.o
 obj-y += misc.o
 obj-y += clock-snapdragon.o
 obj-y += dram.o
+obj-y += pinctrl-snapdragon.o
+obj-y += pinctrl-apq8016.o
+obj-y += pinctrl-apq8096.o

diff --git a/arch/arm/mach-snapdragon/pinctrl-apq8096.c b/arch/arm/mach-snapdragon/pinctrl-apq8096.c
new file mode 100644 (file)
index 0000000..20a71c3
--- /dev/null
+++ b/arch/arm/mach-snapdragon/pinctrl-apq8096.c
@@ -0,0 +1,56 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Qualcomm APQ8096 pinctrl
+ *
+ * (C) Copyright 2019 Ramon Fried <ramon.fried@gmail.com>
+ *
+ */
+
+#include "pinctrl-snapdragon.h"
+#include <common.h>
+
+#define MAX_PIN_NAME_LEN 32
+static char pin_name[MAX_PIN_NAME_LEN];
+static const char * const msm_pinctrl_pins[] = {
+       "SDC1_CLK",
+       "SDC1_CMD",
+       "SDC1_DATA",
+       "SDC2_CLK",
+       "SDC2_CMD",
+       "SDC2_DATA",
+       "SDC1_RCLK",
+};
+
+static const struct pinctrl_function msm_pinctrl_functions[] = {
+       {"blsp_uart8", 2},
+};
+
+static const char *apq8096_get_function_name(struct udevice *dev,
+                                            unsigned int selector)
+{
+       return msm_pinctrl_functions[selector].name;
+}
+
+static const char *apq8096_get_pin_name(struct udevice *dev,
+                                       unsigned int selector)
+{
+       if (selector < 150) {
+               snprintf(pin_name, MAX_PIN_NAME_LEN, "GPIO_%u", selector);
+               return pin_name;
+       } else {
+               return msm_pinctrl_pins[selector - 150];
+       }
+}
+
+static unsigned int apq8096_get_function_mux(unsigned int selector)
+{
+       return msm_pinctrl_functions[selector].val;
+}
+
+struct msm_pinctrl_data apq8096_data = {
+       .pin_count = 157,
+       .functions_count = ARRAY_SIZE(msm_pinctrl_functions),
+       .get_function_name = apq8096_get_function_name,
+       .get_function_mux = apq8096_get_function_mux,
+       .get_pin_name = apq8096_get_pin_name,
+};

diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
index 5365ccdb70c64b05b8fc0c79b05b0cb23526b384..ac511d9ee51c98945c0d854ab984b0f67e465f69 100644 (file)
--- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
+++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.c
@@ -113,8 +113,8 @@ static struct pinctrl_ops msm_pinctrl_ops = {
 };
 
 static const struct udevice_id msm_pinctrl_ids[] = {
-       { .compatible = "qcom,tlmm-msm8916", .data = (ulong)&apq8016_data },
        { .compatible = "qcom,tlmm-apq8016", .data = (ulong)&apq8016_data },
+       { .compatible = "qcom,tlmm-apq8096", .data = (ulong)&apq8096_data },
        { }
 };
 

diff --git a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
index c47d988af4ce6807db0c2c1ebf45570bca6ef291..24f8863f59b5e4bedb66633e859042083edbea0f 100644 (file)
--- a/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
+++ b/arch/arm/mach-snapdragon/pinctrl-snapdragon.h
@@ -26,5 +26,6 @@ struct pinctrl_function {
 };
 
 extern struct msm_pinctrl_data apq8016_data;
+extern struct msm_pinctrl_data apq8096_data;
 
 #endif