For a planned new SoC in this SoC family, the base address of the
DRAM will be changed from 0x80000000 to 0x20000000.
The PIE support will be useful to maintain multiple similar SoCs
whose DRAM addresses differ.
Now CONFIG_SYS_TEXT_BASE is not important. I just set it to 0
to ensure CONFIG_POSITION_INDEPENDENT is working.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
CONFIG_ARM=y
+CONFIG_POSITION_INDEPENDENT=y
+CONFIG_INIT_SP_RELATIVE=y
CONFIG_ARM_SMCCC=y
CONFIG_ARCH_UNIPHIER=y
-CONFIG_SYS_TEXT_BASE=0x84000000
+CONFIG_SYS_TEXT_BASE=0x00000000
CONFIG_SYS_MALLOC_F_LEN=0x2000
CONFIG_NR_DRAM_BANKS=3
CONFIG_ARCH_UNIPHIER_V8_MULTI=y