]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
arm64: versal: Update mini u-boot eMMC node parameters
authorAshok Reddy Soma <ashok.reddy.soma@xilinx.com>
Wed, 7 Oct 2020 06:36:54 +0000 (00:36 -0600)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 27 Oct 2020 07:13:31 +0000 (08:13 +0100)
Mini u-boot eMMC dt parameters are not in sync with full u-boot dt.

Frequency for eMMC is fixed to 25Mhz. Due to this, mmc multi-block write
commands are failing. Increase frequency to 200Mhz to fix this issue.

Add bus-width = <8>, non-removable and disable-wp properties to the node
as this is eMMC.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arch/arm/dts/versal-mini-emmc0.dts
arch/arm/dts/versal-mini-emmc1.dts

index 7826a282134bc29468d0c1c8b1603b7474bf84e8..6a6e7467a233be65b18dc9bde24a4d103f080520 100644 (file)
        #size-cells = <2>;
        model = "Xilinx Versal MINI eMMC0";
 
-       clk25: clk25 {
+       clk200: clk200 {
                compatible = "fixed-clock";
                #clock-cells = <0x0>;
-               clock-frequency = <25000000>;
+               clock-frequency = <200000000>;
        };
 
        dcc: dcc {
                sdhci0: sdhci@f1040000 {
                        compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
                        status = "okay";
+                       non-removable;
+                       disable-wp;
+                       bus-width = <8>;
                        reg = <0x0 0xf1040000 0x0 0x10000>;
                        clock-names = "clk_xin", "clk_ahb";
-                       clocks = <&clk25 &clk25>;
+                       clocks = <&clk200 &clk200>;
                        xlnx,device_id = <0>;
                        no-1-8-v;
                        xlnx,mio-bank = <0>;
index 2f28f856a6a3a53b3d1008efcc46e81bddbf8fc6..c342e6bdf7ad6323e53bfb9ad2894040ba4bf1e9 100644 (file)
        #size-cells = <2>;
        model = "Xilinx Versal MINI eMMC1";
 
-       clk25: clk25 {
+       clk200: clk200 {
                compatible = "fixed-clock";
                #clock-cells = <0x0>;
-               clock-frequency = <25000000>;
+               clock-frequency = <200000000>;
        };
 
        dcc: dcc {
                sdhci1: sdhci@f1050000 {
                        compatible = "xlnx,versal-8.9a", "arasan,sdhci-8.9a";
                        status = "okay";
+                       non-removable;
+                       disable-wp;
+                       bus-width = <8>;
                        reg = <0x0 0xf1050000 0x0 0x10000>;
                        clock-names = "clk_xin", "clk_ahb";
-                       clocks = <&clk25 &clk25>;
+                       clocks = <&clk200 &clk200>;
                        xlnx,device_id = <1>;
                        no-1-8-v;
                        xlnx,mio-bank = <0>;