fsl_esdhc: fix PIO mode transfers

The pointer to the registers used to control the Freescale ESDHC MMC
controller is not initialized correctly when using PIO mode. This is
fixed by initializing the pointer in the same way as all other sites
within the driver.

Examining the commit history shows that this was broken at introduction
due to a code change in upstream U-Boot to support the mx51 processor
family.

Reported-by: Jim Lentz <JLentz@zhone.com>
Cc: Andy Fleming <afleming@freescale.com>
Cc: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu>

diff --git a/drivers/mmc/fsl_esdhc.c b/drivers/mmc/fsl_esdhc.c
index 1ed53559b3be7df7787bb36bd48ad74c5eec54e9..a2f35e3e99159dc0481737a0bb4d1f1e55fc0da6 100644 (file)
--- a/drivers/mmc/fsl_esdhc.c
+++ b/drivers/mmc/fsl_esdhc.c
@@ -114,7 +114,8 @@ uint esdhc_xfertyp(struct mmc_cmd *cmd, struct mmc_data *data)
 static void
 esdhc_pio_read_write(struct mmc *mmc, struct mmc_data *data)
 {
-       struct fsl_esdhc *regs = mmc->priv;
+       struct fsl_esdhc_cfg *cfg = mmc->priv;
+       struct fsl_esdhc *regs = (struct fsl_esdhc *)cfg->esdhc_base;
        uint blocks;
        char *buffer;
        uint databuf;