Fix a get_board_sys_clk() use-before-def warning.

Signed-off-by: Jon Loeliger <jdl@jdl.com>

diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c
index 5e05ab81f1b9cf71cb131a74bbd610041c37652d..6775a11431ab8d6ece94e7126b33f049866c8508 100644 (file)
--- a/cpu/mpc86xx/speed.c
+++ b/cpu/mpc86xx/speed.c
@@ -30,6 +30,70 @@
 #include <asm/processor.h>
 
 
+/*
+ * get_board_sys_clk
+ *     Reads the FPGA on board for CONFIG_SYS_CLK_FREQ
+ */
+
+unsigned long get_board_sys_clk(ulong dummy)
+{
+       u8 i, go_bit, rd_clks;
+       ulong val = 0;
+
+       go_bit = in8(PIXIS_BASE + PIXIS_VCTL);
+       go_bit &= 0x01;
+
+       rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0);
+       rd_clks &= 0x1C;
+
+       /*
+        * Only if both go bit and the SCLK bit in VCFGEN0 are set
+        * should we be using the AUX register. Remember, we also set the
+        * GO bit to boot from the alternate bank on the on-board flash
+        */
+
+       if (go_bit) {
+               if (rd_clks == 0x1c)
+                       i = in8(PIXIS_BASE + PIXIS_AUX);
+               else
+                       i = in8(PIXIS_BASE + PIXIS_SPD);
+       } else {
+               i = in8(PIXIS_BASE + PIXIS_SPD);
+       }
+
+       i &= 0x07;
+
+       switch (i) {
+       case 0:
+               val = 33000000;
+               break;
+       case 1:
+               val = 40000000;
+               break;
+       case 2:
+               val = 50000000;
+               break;
+       case 3:
+               val = 66000000;
+               break;
+       case 4:
+               val = 83000000;
+               break;
+       case 5:
+               val = 100000000;
+               break;
+       case 6:
+               val = 134000000;
+               break;
+       case 7:
+               val = 166000000;
+               break;
+       }
+
+       return val;
+}
+
+
 void get_sys_info (sys_info_t *sysInfo)
 {
        volatile immap_t    *immap = (immap_t *)CFG_IMMR;
@@ -125,67 +189,3 @@ ulong get_bus_freq(ulong dummy)
 
        return val;
 }
-
-
-/*
- * get_board_sys_clk
- *     Reads the FPGA on board for CONFIG_SYS_CLK_FREQ
- */
-
-unsigned long get_board_sys_clk(ulong dummy)
-{
-       u8 i, go_bit, rd_clks;
-       ulong val;
-
-       go_bit = in8(PIXIS_BASE + PIXIS_VCTL);
-       go_bit &= 0x01;
-
-       rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0);
-       rd_clks &= 0x1C;
-
-       /*
-        * Only if both go bit and the SCLK bit in VCFGEN0 are set
-        * should we be using the AUX register. Remember, we also set the
-        * GO bit to boot from the alternate bank on the on-board flash
-        */
-
-       if (go_bit) {
-               if (rd_clks == 0x1c)
-                       i = in8(PIXIS_BASE + PIXIS_AUX);
-               else
-                       i = in8(PIXIS_BASE + PIXIS_SPD);
-       } else {
-               i = in8(PIXIS_BASE + PIXIS_SPD);
-       }
-
-       i &= 0x07;
-
-       switch (i) {
-       case 0:
-               val = 33000000;
-               break;
-       case 1:
-               val = 40000000;
-               break;
-       case 2:
-               val = 50000000;
-               break;
-       case 3:
-               val = 66000000;
-               break;
-       case 4:
-               val = 83000000;
-               break;
-       case 5:
-               val = 100000000;
-               break;
-       case 6:
-               val = 134000000;
-               break;
-       case 7:
-               val = 166000000;
-               break;
-       }
-
-       return val;
-}