x86: broadwell: Show the memory delay

Samus only takes 7 seconds but it is long enough to think it has hung. Add
a message about what it is doing, similar to the approach on coral.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c
index 56cc253831aa1f97bccb0c3fc75b1008a2c5a439..ff959d1bd8d859ef62e553a79d81bec2e213a576 100644 (file)
--- a/arch/x86/cpu/intel_common/mrc.c
+++ b/arch/x86/cpu/intel_common/mrc.c
@@ -9,6 +9,7 @@
 #include <dm.h>
 #include <init.h>
 #include <log.h>
+#include <spl.h>
 #include <syscon.h>
 #include <asm/cpu.h>
 #include <asm/global_data.h>
@@ -251,13 +252,28 @@ static int sdram_initialise(struct udevice *dev, struct udevice *me_dev,
 int mrc_common_init(struct udevice *dev, void *pei_data, bool use_asm_linkage)
 {
        struct udevice *me_dev;
-       int ret;
+       int ret, delay;
 
        ret = syscon_get_by_driver_data(X86_SYSCON_ME, &me_dev);
        if (ret)
                return ret;
 
+       delay = dev_read_u32_default(dev, "fspm,training-delay", 0);
+       if (spl_phase() == PHASE_SPL) {
+               if (delay)
+                       printf("SDRAM training (%d seconds)...", delay);
+               else
+                       log_debug("SDRAM init...");
+       } else {
+               if (delay)
+                       printf("(%d seconds)...", delay);
+       }
+
        ret = sdram_initialise(dev, me_dev, pei_data, use_asm_linkage);
+       if (delay)
+               printf("done\n");
+       else
+               log_debug("done\n");
        if (ret)
                return ret;
        quick_ram_check();

diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts
index 96705ceed0741bd86012f6fdd9ce211aee0fcf75..ddff277046a411e0ffc2521fe6e05332781c73ed 100644 (file)
--- a/arch/x86/dts/chromebook_samus.dts
+++ b/arch/x86/dts/chromebook_samus.dts
@@ -266,6 +266,7 @@
                        board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>,
                                        <&gpio_c 3 0>, <&gpio_c 1 0>;
                        bootph-all;
+                       fspm,training-delay = <7>;
                        spd {
                                #address-cells = <1>;
                                #size-cells = <0>;