arm: socfpga: reset: FIX address of tstscratch register

The Cyclone V Hard Processor System Technical Reference Manual in the
chapter about the Reset Manager Module Address Map stats that the offset
of the tstscratch register ist 0x54 not 0x24.

Cyclone V Hard Processor System Technical Reference Manual cv_5v4 2015.11.02
page 3-17 Reset Manager Module Address Map

Signed-off-by: Philipp Rosenberger <ilu@linutronix.de>

diff --git a/arch/arm/mach-socfpga/include/mach/reset_manager.h b/arch/arm/mach-socfpga/include/mach/reset_manager.h
index 666a2ef8dfc7d5599aaa21a8d3bc6c39aa96e8d2..e50fbd86e6e6eaab795b90cd4ea5e263c320a760 100644 (file)
--- a/arch/arm/mach-socfpga/include/mach/reset_manager.h
+++ b/arch/arm/mach-socfpga/include/mach/reset_manager.h
@@ -25,6 +25,7 @@ struct socfpga_reset_manager {
        u32     per2_mod_reset;
        u32     brg_mod_reset;
        u32     misc_mod_reset;
+       u32     padding2[12];
        u32     tstscratch;
 };