arm: rmobile: r8a7794: Skip initialize L2 cache

rmobile/lowlevel_init_ca15.S are common in r8a7790, r8a7791 and r8a7794 of
rmobile SoCs.  The initialize L2 cache in lowlevel_init_ca15.S only needed
for Cortex-A15. The r8a7794 is Cortex-A7, not Cortex-A15.
This adds Skip to initialize L2 cache when r8a7794.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>

diff --git a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
index 5820e1a37a45a10b428cbc6409d074c61890413e..879e0e097f19974ae90d4b534372bd20d01708bd 100644 (file)
--- a/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
+++ b/arch/arm/cpu/armv7/rmobile/lowlevel_init_ca15.S
@@ -35,6 +35,13 @@ do_cpu_waiting:
  */
        .align  4
 do_lowlevel_init:
+       ldr     r2, =0xFF000044         /* PRR */
+       ldr     r1, [r2]
+       and     r1, r1, #0x7F00
+       lsrs    r1, r1, #8
+       cmp     r1, #0x4C               /* 0x4C is ID of r8a7794 */
+       beq     _exit_init_l2_a15
+
        /* surpress wfe if ca15 */
        tst r4, #4
        mrceq p15, 0, r0, c1, c0, 1     /* actlr */