x86: ivybridge: Move lpc_enable() into gma.c

This graphics init code is best placed in the gma init code. Move the code
and drop the function.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c b/arch/x86/cpu/ivybridge/bd82x6x.c
index 188b7da4f774000bd8aceeec820c7aee8acda4e9..9e7e30aa11aba9ca715b104f00495c5ed54acc88 100644 (file)
--- a/arch/x86/cpu/ivybridge/bd82x6x.c
+++ b/arch/x86/cpu/ivybridge/bd82x6x.c
@@ -29,7 +29,6 @@ static int bd82x6x_probe(struct udevice *dev)
                return 0;
 
        hose = pci_bus_to_hose(0);
-       lpc_enable(PCH_LPC_DEV);
        lpc_init_extra(hose, PCH_LPC_DEV);
 
        /* Cause the SATA device to do its init */

diff --git a/arch/x86/cpu/ivybridge/gma.c b/arch/x86/cpu/ivybridge/gma.c
index 1748f7fdceb9a81ec87ea79bcf5a381eac5c4e11..b94536c7a6bcb9263be92117ddb2b4151c05d815 100644 (file)
--- a/arch/x86/cpu/ivybridge/gma.c
+++ b/arch/x86/cpu/ivybridge/gma.c
@@ -806,6 +806,10 @@ int gma_func0_init(struct udevice *dev, const void *blob, int node)
        u32 reg32;
        int ret;
 
+       /* Enable PCH Display Port */
+       writew(0x0010, RCB_REG(DISPBDF));
+       setbits_le32(RCB_REG(FD2), PCH_ENABLE_DBDF);
+
        ret = uclass_first_device(UCLASS_NORTHBRIDGE, &nbridge);
        if (!nbridge)
                return -ENODEV;

diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c
index 0d85de2a766e4b21ff5e9005324d1c11e763a8ba..44c4825f134380f323b12c0af2fd7818239b378f 100644 (file)
--- a/arch/x86/cpu/ivybridge/lpc.c
+++ b/arch/x86/cpu/ivybridge/lpc.c
@@ -602,13 +602,6 @@ int lpc_init_extra(struct pci_controller *hose, pci_dev_t dev)
        return 0;
 }
 
-void lpc_enable(pci_dev_t dev)
-{
-       /* Enable PCH Display Port */
-       writew(0x0010, RCB_REG(DISPBDF));
-       setbits_le32(RCB_REG(FD2), PCH_ENABLE_DBDF);
-}
-
 static int bd82x6x_lpc_early_init(struct udevice *dev)
 {
        /* Setting up Southbridge. In the northbridge code. */

diff --git a/arch/x86/include/asm/arch-ivybridge/pch.h b/arch/x86/include/asm/arch-ivybridge/pch.h
index f35803bbf4bfe1f24327fc516ea80a4f97dfcad5..682a557fbd7c8a07368b737988314ad15b6b5253 100644 (file)
--- a/arch/x86/include/asm/arch-ivybridge/pch.h
+++ b/arch/x86/include/asm/arch-ivybridge/pch.h
@@ -471,6 +471,5 @@ void pch_iobp_update(u32 address, u32 andvalue, u32 orvalue);
 #define TCO2_STS       0x66
 
 int lpc_init_extra(struct pci_controller *hose, pci_dev_t dev);
-void lpc_enable(pci_dev_t dev);
 
 #endif