drivers: use devfdt_get_addr_size_index_ptr when cast to pointer

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_size_index_ptr instead of the devfdt_get_addr_size_index
function in the various files in the drivers directory that cast to
a pointer.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

diff --git a/drivers/pci/pcie_dw_mvebu.c b/drivers/pci/pcie_dw_mvebu.c
index a0b82c78321c0ed9e19885e0d763073a8e79b277..3b2ada5464eb6813eeb1fd6f52f7088cffcdcd57 100644 (file)
--- a/drivers/pci/pcie_dw_mvebu.c
+++ b/drivers/pci/pcie_dw_mvebu.c
@@ -569,9 +569,9 @@ static int pcie_dw_mvebu_of_to_plat(struct udevice *dev)
                return -EINVAL;
 
        /* Get the config space base address and size */
-       pcie->cfg_base = (void *)devfdt_get_addr_size_index(dev, 1,
-                                                        &pcie->cfg_size);
-       if ((fdt_addr_t)pcie->cfg_base == FDT_ADDR_T_NONE)
+       pcie->cfg_base = devfdt_get_addr_size_index_ptr(dev, 1,
+                                                       &pcie->cfg_size);
+       if (!pcie->cfg_base)
                return -EINVAL;
 
        return 0;

diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c
index f931e4cf3e2fbee9bc5432e359cd4cd85827ce71..ac81468a18467fb443ef2046cb88d9d61d7aa974 100644 (file)
--- a/drivers/spi/cadence_qspi.c
+++ b/drivers/spi/cadence_qspi.c
@@ -390,8 +390,7 @@ static int cadence_spi_of_to_plat(struct udevice *bus)
        ofnode subnode;
 
        plat->regbase = (void *)devfdt_get_addr_index(bus, 0);
-       plat->ahbbase = (void *)devfdt_get_addr_size_index(bus, 1,
-                       &plat->ahbsize);
+       plat->ahbbase = devfdt_get_addr_size_index_ptr(bus, 1, &plat->ahbsize);
        plat->is_decoded_cs = dev_read_bool(bus, "cdns,is-decoded-cs");
        plat->fifo_depth = dev_read_u32_default(bus, "cdns,fifo-depth", 128);
        plat->fifo_width = dev_read_u32_default(bus, "cdns,fifo-width", 4);