struct mm_region *mem_map = g12a_mem_map;
-static void g12a_enable_external_mdio(void)
-{
- writel(0x0, ETH_PHY_CNTL2);
-}
-
-static void g12a_enable_internal_mdio(void)
-{
- /* Fire up the PHY PLL */
- writel(0x29c0040a, ETH_PLL_CNTL0);
- writel(0x927e0000, ETH_PLL_CNTL1);
- writel(0xac5f49e5, ETH_PLL_CNTL2);
- writel(0x00000000, ETH_PLL_CNTL3);
- writel(0x00000000, ETH_PLL_CNTL4);
- writel(0x20200000, ETH_PLL_CNTL5);
- writel(0x0000c002, ETH_PLL_CNTL6);
- writel(0x00000023, ETH_PLL_CNTL7);
- writel(0x39c0040a, ETH_PLL_CNTL0);
- writel(0x19c0040a, ETH_PLL_CNTL0);
-
- /* Select the internal MDIO */
- writel(0x33000180, ETH_PHY_CNTL0);
- writel(0x00074043, ETH_PHY_CNTL1);
- writel(0x00000260, ETH_PHY_CNTL2);
-}
-
/* Configure the Ethernet MAC with the requested interface mode
* with some optional flags.
*/
G12A_ETH_REG_0_TX_RATIO(4) |
G12A_ETH_REG_0_PHY_CLK_EN |
G12A_ETH_REG_0_CLK_EN);
- g12a_enable_external_mdio();
break;
case PHY_INTERFACE_MODE_RMII:
out_le32(G12A_ETH_REG_0, G12A_ETH_REG_0_PHY_INTF_RMII |
G12A_ETH_REG_0_INVERT_RMII_CLK |
G12A_ETH_REG_0_CLK_EN);
-
- /* Use G12A RMII Internal PHY */
- if (flags & MESON_USE_INTERNAL_RMII_PHY)
- g12a_enable_internal_mdio();
- else
- g12a_enable_external_mdio();
-
break;
default:
GX_ETH_REG_0_PHY_CLK_EN |
GX_ETH_REG_0_CLK_EN);
- /* Reset to external PHY */
- if(!IS_ENABLED(CONFIG_MESON_GXBB))
- writel(0x2009087f, GX_ETH_REG_3);
-
break;
case PHY_INTERFACE_MODE_RMII:
out_le32(GX_ETH_REG_0, GX_ETH_REG_0_INVERT_RMII_CLK |
GX_ETH_REG_0_CLK_EN);
- /* Use GXL RMII Internal PHY (also on GXM) */
- if (!IS_ENABLED(CONFIG_MESON_GXBB)) {
- if ((flags & MESON_USE_INTERNAL_RMII_PHY)) {
- writel(0x10110181, GX_ETH_REG_2);
- writel(0xe40908ff, GX_ETH_REG_3);
- } else
- writel(0x2009087f, GX_ETH_REG_3);
- }
+ if (!IS_ENABLED(CONFIG_MESON_GXBB))
+ writel(0x10110181, GX_ETH_REG_2);
break;