spi: cadence_qspi: add device tree binding doc

This patch adds the device tree binding doc for the cadence qspi controller &
also removes the not needed properties from the stv0991 device tree.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Reviewed-by: Jagannadh Teki <jteki@openedev.com>

diff --git a/arch/arm/dts/stv0991.dts b/arch/arm/dts/stv0991.dts
index 556df821e4e36f2167f50d9d021f0f18d7a551b5..fa3fd641b23d95ddf94991a9e9ff636e826f4739 100644 (file)
--- a/arch/arm/dts/stv0991.dts
+++ b/arch/arm/dts/stv0991.dts
@@ -32,11 +32,7 @@
                        reg = <0x80203000 0x100>,
                                <0x40000000 0x1000000>;
                        clocks = <3750000>;
-                       ext-decoder = <0>; /* external decoder */
-                       num-cs = <4>;
-                       fifo-depth = <256>;
                        sram-size = <256>;
-                       bus-num = <0>;
                        status = "okay";
 
                        flash0: n25q32@0 {
@@ -48,7 +44,6 @@
                                m25p,fast-read;
                                page-size = <256>;
                                block-size = <16>;      /* 2^16, 64KB */
-                               read-delay = <4>;       /* delay value in read data capture register */
                                tshsl-ns = <50>;
                                tsd2d-ns = <50>;
                                tchsh-ns = <4>;

diff --git a/doc/device-tree-bindings/spi/spi-cadence.txt b/doc/device-tree-bindings/spi/spi-cadence.txt
new file mode 100644 (file)
index 0000000..c1e2233
--- /dev/null
+++ b/doc/device-tree-bindings/spi/spi-cadence.txt
@@ -0,0 +1,28 @@
+Cadence QSPI controller device tree bindings
+--------------------------------------------
+
+Required properties:
+- compatible           : should be "cadence,qspi".
+- reg                  : 1.Physical base address and size of SPI registers map.
+                         2. Physical base address & size of NOR Flash.
+- clocks               : Clock phandles (see clock bindings for details).
+- sram-size            : spi controller sram size.
+- status               : enable in requried dts.
+
+connected flash properties
+--------------------------
+
+- spi-max-frequency    : Max supported spi frequency.
+- page-size            : Flash page size.
+- block-size           : Flash memory block size.
+- tshsl-ns             : Added delay in master reference clocks (ref_clk) for
+                         the length that the master mode chip select outputs
+                         are de-asserted between transactions.
+- tsd2d-ns             : Delay in master reference clocks (ref_clk) between one
+                         chip select being de-activated and the activation of
+                         another.
+- tchsh-ns             : Delay in master reference clocks between last bit of
+                         current transaction and de-asserting the device chip
+                         select (n_ss_out).
+- tslch-ns             : Delay in master reference clocks between setting
+                         n_ss_out low and first bit transfer