]> git.dujemihanovic.xyz Git - u-boot.git/commitdiff
m68k: rename CONFIG_MCFTMR to CFG_MCFTMR
authorAngelo Dureghello <angelo@kernel-space.org>
Sat, 25 Feb 2023 22:25:26 +0000 (23:25 +0100)
committerAngelo Dureghello <angelo@kernel-space.org>
Wed, 15 Mar 2023 00:41:57 +0000 (01:41 +0100)
This is not a Kconfig option so changing to _CFG.

Signed-off-by: Angelo Durgehello <angelo@kernel-space.org>
41 files changed:
arch/m68k/cpu/mcf523x/interrupts.c
arch/m68k/cpu/mcf52x2/interrupts.c
arch/m68k/cpu/mcf532x/interrupts.c
arch/m68k/cpu/mcf5445x/interrupts.c
arch/m68k/include/asm/immap.h
arch/m68k/lib/time.c
board/freescale/m53017evb/README
board/freescale/m5373evb/README
configs/M5208EVBE_defconfig
configs/M5235EVB_Flash32_defconfig
configs/M5235EVB_defconfig
configs/M5249EVB_defconfig
configs/M5253DEMO_defconfig
configs/M5272C3_defconfig
configs/M5275EVB_defconfig
configs/M5282EVB_defconfig
configs/M53017EVB_defconfig
configs/M5329AFEE_defconfig
configs/M5329BFEE_defconfig
configs/M5373EVB_defconfig
configs/amcore_defconfig
configs/astro_mcf5373l_defconfig
configs/cobra5272_defconfig
configs/eb_cpu5282_defconfig
configs/eb_cpu5282_internal_defconfig
configs/stmark2_defconfig
include/configs/M5208EVBE.h
include/configs/M5235EVB.h
include/configs/M5249EVB.h
include/configs/M5253DEMO.h
include/configs/M5272C3.h
include/configs/M5275EVB.h
include/configs/M5282EVB.h
include/configs/M53017EVB.h
include/configs/M5329EVB.h
include/configs/M5373EVB.h
include/configs/amcore.h
include/configs/astro_mcf5373l.h
include/configs/cobra5272.h
include/configs/eb_cpu5282.h
include/configs/stmark2.h

index 331288e00602e9722fdb775b7b22e605ae009baf..b02ea29f635e034ffc9b5d2c630526f0396f822a 100644 (file)
@@ -22,7 +22,7 @@ int interrupt_init(void)
        return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
        int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
index e8a1e132d278a7d88c53b2005485f2933e0ada33..e787c7605f8a8a8b3ba0ce9b40acd9359cb73e97 100644 (file)
@@ -34,7 +34,7 @@ int interrupt_init(void)
        return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
        intctrl_t *intp = (intctrl_t *) (CFG_SYS_INTR_BASE);
@@ -42,7 +42,7 @@ void dtimer_intr_setup(void)
        clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK);
        setbits_be32(&intp->int_icr1, CFG_SYS_TMRINTR_PRI);
 }
-#endif                         /* CONFIG_MCFTMR */
+#endif                         /* CFG_MCFTMR */
 #endif                         /* CONFIG_M5272 */
 
 #if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \
@@ -63,7 +63,7 @@ int interrupt_init(void)
        return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
        int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
@@ -72,7 +72,7 @@ void dtimer_intr_setup(void)
        clrbits_be32(&intp->imrl0, 0x00000001);
        clrbits_be32(&intp->imrl0, CFG_SYS_TMRINTR_MASK);
 }
-#endif                         /* CONFIG_MCFTMR */
+#endif                         /* CFG_MCFTMR */
 #endif                         /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
 
 #if defined(CONFIG_M5249) || defined(CONFIG_M5253)
@@ -83,11 +83,11 @@ int interrupt_init(void)
        return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
        mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
        mbar_writeByte(MCFSIM_TIMER2ICR, CFG_SYS_TMRINTR_PRI);
 }
-#endif                         /* CONFIG_MCFTMR */
+#endif                         /* CFG_MCFTMR */
 #endif                         /* CONFIG_M5249 || CONFIG_M5253 */
index 64e04664a52b846dda4628d9e34d7aef8a839963..bbe823c0cf7eb4e42799b774aa4b8a4ae879889e 100644 (file)
@@ -23,7 +23,7 @@ int interrupt_init(void)
        return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
        int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
index ea0cf87990c906f9f2076654419f5c54f32e0f3a..fb80a879c7edc58a915ba79c4d43e91606fbfa27 100644 (file)
@@ -26,7 +26,7 @@ int interrupt_init(void)
        return 0;
 }
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 void dtimer_intr_setup(void)
 {
        int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
index 8207c8d5b734c404495ce5f13d50f926c0630286..74516cc6219920f59e02125d1527082bc51cb956 100644 (file)
@@ -16,7 +16,7 @@
 #define CFG_SYS_UART_BASE              (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG             (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
@@ -38,7 +38,7 @@
 #define CFG_SYS_UART_BASE              (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR3)
 #define CFG_SYS_TMRPND_REG             (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
@@ -63,7 +63,7 @@
 #define CFG_SYS_NUM_IRQS               (64)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG             (mbar_readLong(MCFSIM_IPR))
@@ -86,7 +86,7 @@
 #define CFG_SYS_NUM_IRQS               (64)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG             (mbar_readLong(MCFSIM_IPR))
 #define CFG_SYS_UART_BASE              (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR3)
 #define CFG_SYS_TMRPND_REG             (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
 #define CFG_SYS_NUM_IRQS               (64)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_TMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_TMR3)
 #define CFG_SYS_TMRPND_REG             (((volatile intctrl_t *)(CFG_SYS_INTR_BASE))->int_isr)
 #define CFG_SYS_NUM_IRQS               (192)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR3)
 #define CFG_SYS_TMRPND_REG             (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
 #define CFG_SYS_NUM_IRQS               (128)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR3)
 #define CFG_SYS_TMRPND_REG             (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
 #define CFG_SYS_NUM_IRQS             (64)
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE          (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE             (MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG             (((volatile intctrl_t *) \
 #define CFG_SYS_UART_BASE              (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG             (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
 #define CFG_SYS_UART_BASE              (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG             (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
 #define MMAP_DSPI                      MMAP_DSPI0
 
 /* Timer */
-#ifdef CONFIG_MCFTMR
+#ifdef CFG_MCFTMR
 #define CFG_SYS_UDELAY_BASE            (MMAP_DTMR0)
 #define CFG_SYS_TMR_BASE               (MMAP_DTMR1)
 #define CFG_SYS_TMRPND_REG     (((int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
index 2ce69088d94ca5db69199d61f01c94bd20394039..ca8c0396235350836209d9b11f5d370df3ff45a5 100644 (file)
@@ -25,7 +25,7 @@ static volatile ulong timestamp = 0;
 #define CFG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
 #endif
 
-#if defined(CONFIG_MCFTMR)
+#if defined(CFG_MCFTMR)
 #ifndef CFG_SYS_UDELAY_BASE
 #      error   "uDelay base not defined!"
 #endif
@@ -111,7 +111,7 @@ ulong get_timer(ulong base)
        return (timestamp - base);
 }
 
-#endif                         /* CONFIG_MCFTMR */
+#endif                         /* CFG_MCFTMR */
 
 /*
  * This function is derived from PowerPC code (read timebase as long long).
index 34f05f3fdc7239a572f56a0d22cbec0bfa358af2..5d5c5e7adf9702776349c7a0ad16b2e47c6361d8 100644 (file)
@@ -87,7 +87,7 @@ CONFIG_SYS_FEC0_PINMUX                -- Set FEC0 Pin configuration
 CONFIG_SYS_FEC0_MIIBASE                -- Set FEC0 MII base register
 MCFFEC_TOUT_LOOP               -- set FEC timeout loop
 
-CONFIG_MCFTMR                  -- define to use DMA timer
+CFG_MCFTMR                     -- define to use DMA timer
 
 CONFIG_SYS_I2C_FSL             -- define to use FSL common I2C driver
 CONFIG_SYS_I2C_SOFT            -- define for I2C bit-banged
index 7240648796b5e48d80b1e1cbec906ee80f7a77c0..e8bf75f4fb99670aa4e6576c84abf3b414487256 100644 (file)
@@ -86,7 +86,7 @@ CONFIG_SYS_FEC0_PINMUX                -- Set FEC0 Pin configuration
 CONFIG_SYS_FEC0_MIIBASE        -- Set FEC0 MII base register
 MCFFEC_TOUT_LOOP       -- set FEC timeout loop
 
-CONFIG_MCFTMR          -- define to use DMA timer
+CFG_MCFTMR             -- define to use DMA timer
 
 CONFIG_SYS_I2C_FSL     -- define to use FSL common I2C driver
 CONFIG_SYS_I2C_SOFT    -- define for I2C bit-banged
index 263e57f46a0707e0a8d3c5dd2972bdb85c7c1f8f..3263414d1c2eea433f2c3287c2881b09d43277aa 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="-> "
 CONFIG_SYS_LOAD_ADDR=0x40010000
 CONFIG_ENV_ADDR=0x2000
 CONFIG_TARGET_M5208EVBE=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_SYS_MONITOR_BASE=0x00000400
 CONFIG_BOOTDELAY=1
index 88c11162111fd5d66f85962cee97beec0f86619a..0b924563d2a75d016d0c1c0ad28dfc52efd60017 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_LOAD_ADDR=0x20000
 CONFIG_ENV_ADDR=0xFFE04000
 CONFIG_TARGET_M5235EVB=y
 CONFIG_NORFLASH_PS32BIT=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_SYS_MONITOR_BASE=0xFFC00400
 CONFIG_BOOTDELAY=1
index 255f3b9d2f11ce6602b569168de4e4499f03e8ef..fbd3e086ec3be38cbdccae8248a93540e37069aa 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="-> "
 CONFIG_SYS_LOAD_ADDR=0x20000
 CONFIG_ENV_ADDR=0xFFE04000
 CONFIG_TARGET_M5235EVB=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_SYS_MONITOR_BASE=0xFFE00400
 CONFIG_BOOTDELAY=1
index de7f14165bd94ad09da3aa911389b8c5ddc81f61..78f1f4f4bba515f565d6de446666556fe3a2e400 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="M5249EVB"
 CONFIG_SYS_LOAD_ADDR=0x200000
 CONFIG_ENV_ADDR=0xFFE04000
 CONFIG_TARGET_M5249EVB=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=131072
 CONFIG_SYS_MONITOR_BASE=0xFFE00400
 # CONFIG_AUTOBOOT is not set
index ea079972c9bcdd7a22c2db76faccdc637488b677..e6ab998f292e97b337780dff38dbe00b247fbc19 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_DEFAULT_DEVICE_TREE="M5253DEMO"
 CONFIG_SYS_LOAD_ADDR=0x100000
 CONFIG_ENV_ADDR=0xFF804000
 CONFIG_TARGET_M5253DEMO=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_SYS_MONITOR_BASE=0xFF800400
 CONFIG_BOOTDELAY=5
index 324daa016efb6050d06235028612360bec041f52..1c51c4a1666731d5ffc624e4254b8bfa79db28f6 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="-> "
 CONFIG_SYS_LOAD_ADDR=0x20000
 CONFIG_ENV_ADDR=0xFFE04000
 CONFIG_TARGET_M5272C3=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=131072
 CONFIG_SYS_MONITOR_BASE=0xFFE00400
 CONFIG_BOOTDELAY=5
index d84d9d98c5ac2a3e54570aca6e30d8de6f1d523b..ca1c18420ff2f6e6d5d8f698be24272c905a9944 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="-> "
 CONFIG_SYS_LOAD_ADDR=0x800000
 CONFIG_ENV_ADDR=0xFFE04000
 CONFIG_TARGET_M5275EVB=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=131072
 CONFIG_SYS_MONITOR_BASE=0xFFE00400
 CONFIG_BOOTDELAY=5
index 7988d250034d729316f1893f5b23cd5c13b83505..2b053e3bbfe2d8a52cf2f843140cbdf9783be38d 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="-> "
 CONFIG_SYS_LOAD_ADDR=0x20000
 CONFIG_ENV_ADDR=0xFFE04000
 CONFIG_TARGET_M5282EVB=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=131072
 CONFIG_SYS_MONITOR_BASE=0xFFE00400
 CONFIG_BOOTDELAY=5
index d7c07aa2ea96d517304460286d5e506d2d2c790c..c70964f7aa0c40d9981045a5b0da625835206ebe 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="-> "
 CONFIG_SYS_LOAD_ADDR=0x40010000
 CONFIG_ENV_ADDR=0x40000
 CONFIG_TARGET_M53017EVB=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_SYS_MONITOR_BASE=0x00000400
 CONFIG_BOOTDELAY=1
index 989af925f74088d2585c3c6e3e1cc7c95f266d64..455eea255ae65353aca279186248589c1f8b84fc 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="-> "
 CONFIG_SYS_LOAD_ADDR=0x40010000
 CONFIG_ENV_ADDR=0x4000
 CONFIG_TARGET_M5329EVB=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_SYS_MONITOR_BASE=0x00000400
 CONFIG_BOOTDELAY=1
index 7be2a27ba2bef242af67d76543f1839e0fe1bc3c..0251444b3bffdff5c1eac8aabe9c7f919b02c345 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="-> "
 CONFIG_SYS_LOAD_ADDR=0x40010000
 CONFIG_ENV_ADDR=0x4000
 CONFIG_TARGET_M5329EVB=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_SYS_MONITOR_BASE=0x00000400
 CONFIG_BOOTDELAY=1
index 4b278a5b1c854626444243c19c6fba2d59abd0cc..eec95da8573cba34f3ee6afcb9e84962b1e70ff2 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="-> "
 CONFIG_SYS_LOAD_ADDR=0x40010000
 CONFIG_ENV_ADDR=0x4000
 CONFIG_TARGET_M5373EVB=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_SYS_MONITOR_BASE=0x00000400
 CONFIG_BOOTDELAY=1
index 6775379428f9606f39bdde714a7a701a83b5ccb8..0b1a4e87459496d10c874f5c50d760dcda8f69db 100644 (file)
@@ -9,7 +9,6 @@ CONFIG_SYS_PROMPT="amcore $ "
 CONFIG_SYS_LOAD_ADDR=0x20000
 CONFIG_ENV_ADDR=0xFFC1F000
 CONFIG_TARGET_AMCORE=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=126976
 CONFIG_SYS_MONITOR_BASE=0xFFC00400
 CONFIG_BOOTDELAY=1
index a1a25622c779cd9c35101fd2f2569731085316aa..827ebfe742045b2c07defbf3e21bc91639825699 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="URMEL > "
 CONFIG_SYS_LOAD_ADDR=0x20000
 CONFIG_ENV_ADDR=0x1FF8000
 CONFIG_TARGET_ASTRO_MCF5373L=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_SYS_MONITOR_BASE=0x00000400
 CONFIG_BOOTDELAY=1
index 377781f0bc91a232a7be04b7ffc36957eab775d1..6d6380f3be6abcf28ebabce42d9661410fb365d9 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_SYS_PROMPT="COBRA > "
 CONFIG_SYS_LOAD_ADDR=0x20000
 CONFIG_ENV_ADDR=0xFFE04000
 CONFIG_TARGET_COBRA5272=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_MONITOR_LEN=131072
 CONFIG_SYS_MONITOR_BASE=0xFFE00400
 CONFIG_BOOTDELAY=5
index 7304b4938725df09cde37a83f60c19cab935b7c2..6f0882fccfac9a05abd738054f2f1338d7d15c7a 100644 (file)
@@ -7,7 +7,6 @@ CONFIG_SYS_PROMPT="\nEB+CPU5282> "
 CONFIG_SYS_LOAD_ADDR=0x20000
 CONFIG_ENV_ADDR=0xFF040000
 CONFIG_TARGET_EB_CPU5282=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_BARGSIZE=1024
 CONFIG_SYS_MONITOR_LEN=131072
 CONFIG_SYS_MONITOR_BASE=0xFF000400
index 5ecdda418aad0cb8570e0762e573bcb2d8d75cf6..5f4ec93401ebcd0467eeff8f5515b0751659438a 100644 (file)
@@ -6,7 +6,6 @@ CONFIG_DEFAULT_DEVICE_TREE="eb_cpu5282_internal"
 CONFIG_SYS_LOAD_ADDR=0x20000
 CONFIG_ENV_ADDR=0xFF040000
 CONFIG_TARGET_EB_CPU5282=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_BARGSIZE=1024
 CONFIG_SYS_MONITOR_LEN=131072
 CONFIG_SYS_MONITOR_BASE=0xF0000418
index ae7a9cf6da26434f766f9b442242ff41592cf221..ee757099ff582911dce7870351da4c00258a6e74 100644 (file)
@@ -8,7 +8,6 @@ CONFIG_DEFAULT_DEVICE_TREE="stmark2"
 CONFIG_SYS_PROMPT="stmark2 $ "
 CONFIG_SYS_LOAD_ADDR=0x40010000
 CONFIG_TARGET_STMARK2=y
-CONFIG_MCFTMR=y
 CONFIG_SYS_BARGSIZE=256
 CONFIG_SYS_MONITOR_LEN=262144
 CONFIG_TIMESTAMP=y
index a4fda551f1f736e913c1e3d0b93737e559962cf1..4b89f31209a4e19e4ea23915d4c0cc075f9bdc11 100644 (file)
 #define CFG_SYS_CS0_MASK               0x007F0001
 #define CFG_SYS_CS0_CTRL               0x00001FA0
 
+#define CFG_MCFTMR
+
 #endif                         /* _M5208EVBE_H */
index 8939c8e7ab9c3cd71ecb4a281d45d669e0580672..14d46178116bd1420f8b7af437a1c0bd5da2aec8 100644 (file)
 #      define CFG_SYS_CS0_CTRL 0x00001D80
 #endif
 
+#define CFG_MCFTMR
+
 #endif                         /* _M5329EVB_H */
index 4fd539c0174969086b351c32e8d4a849d80e8636..b24042328d330b1633e4d1f467736e2f08752520 100644 (file)
 #define        CFG_SYS_GPIO1_OUT               0x00c70000      /* Set outputs to default state */
 #define CFG_SYS_GPIO1_LED              0x00400000      /* user led                     */
 
+#define CFG_MCFTMR
+
 #endif /* M5249 */
index a6349fc08617fcc40063b2ead2639a467109f10a..008c7257c4328c9e5b47a2cb99d1160c63671b12 100644 (file)
 #define CFG_SYS_GPIO1_OUT              0x00c70000      /* Set outputs to default state */
 #define CFG_SYS_GPIO1_LED              0x00400000      /* user led */
 
+#define CFG_MCFTMR
+
 #endif                         /* _M5253DEMO_H */
index 33c2fc0870601e5e1c5d0d0bc953c6751f107f08..49cf3e878eaca6e339b51cc9a8771781633209ae 100644 (file)
 #define CFG_SYS_PBDDR          0x0000
 #define CFG_SYS_PBDAT          0x0000
 #define CFG_SYS_PDCNT          0x00000000
+
+#define CFG_MCFTMR
+
 #endif                         /* _M5272C3_H */
index 607c5dee2fb0b44de478c1336c34debf0a03e8fd..965327d759de2cf48bd80c7e4636ac738c29015a 100644 (file)
 #define CFG_SYS_CS1_CTRL               0x00001900
 #define CFG_SYS_CS1_MASK               0x00070001
 
+#define CFG_MCFTMR
+
 #endif /* _M5275EVB_H */
index 31699a40b6f7a206c8a0227e9336fc5d44cb075d..f04d9b1b2abfa6b840261cdf29a70ef1a9103b09 100644 (file)
 #define CFG_SYS_DDRUA          0x05
 #define CFG_SYS_PJPAR          0xFF
 
+#define CFG_MCFTMR
+
 #endif                         /* _CONFIG_M5282EVB_H */
index 6359915e09a657555807e853d1e3b7264debd60e..04c456ff9f1577b61f8bc2db7ac0cdd32e01620b 100644 (file)
 #define CFG_SYS_CS1_MASK               0x00070001
 #define CFG_SYS_CS1_CTRL               0x00001FA0
 
+#define CFG_MCFTMR
+
 #endif                         /* _M53017EVB_H */
index 456135bdc64a84891aa7ac33c422f4fb31626e23..0aa1ffd4d4faac79bb51a4b8b3c783404c6d5084 100644 (file)
 #define CFG_SYS_CS2_CTRL               0x00001f60
 #endif
 
+#define CFG_MCFTMR
+
 #endif                         /* _M5329EVB_H */
index 4e8dcb5ef7f7161a5556c11d26b97f457cec0205..8b9e65de98c1924b0ef9d77d2d935d0df5f14ba2 100644 (file)
 #define CFG_SYS_CS2_MASK               (16 << 20)
 #define CFG_SYS_CS2_CTRL               0x00001f60
 
+#define CFG_MCFTMR
+
 #endif                         /* _M5373EVB_H */
index 37c45e7172f5bab37ae5bebe4088aaa88ee57b2e..35f09b47e857838631cbe692fbf0385a23a494da 100644 (file)
@@ -10,7 +10,7 @@
 
 #define CFG_SYS_UART_PORT              0
 
-#define CONFIG_MCFTMR
+#define CFG_MCFTMR
 #define CONFIG_MCFUART
 #define CONFIG_SYS_UART_PORT           0
 #define CONFIG_SYS_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
index 65224324fbc216041317ac1d92cdc6e17c2c4084..80f8c4129f581b8dee233e8b1ebd90d0e2d488bd 100644 (file)
 #define CFG_SYS_CACHE_ICACR            (CF_CACR_EC | CF_CACR_CINVA | \
                                         CF_CACR_DCM_P)
 
+#define CFG_MCFTMR
+
 #endif /* _CONFIG_ASTRO_MCF5373L_H */
index cd50ffe98d0dfb0c516acf36929facd062ee170b..276ecc30ccc7c15df28f7895ec251fb88b2e75b0 100644 (file)
@@ -184,4 +184,6 @@ configuration */
 #define CFG_SYS_PBDAT          0x0000                  /* PortB value reg. */
 #define CFG_SYS_PDCNT          0x00000000              /* PortD control reg. */
 
+#define CFG_MCFTMR
+
 #endif /* _CONFIG_COBRA5272_H */
index 26e4ade34ee724315f99891706de774f83bdb5dc..9503ab66f0ff3afa93d84b1ca251df53b8629ea4 100644 (file)
 #define CFG_SYS_DDRUA          0x05
 #define CFG_SYS_PJPAR          0xFF
 
+#define CFG_MCFTMR
+
 #endif /* _CONFIG_M5282EVB_H */
 /*---------------------------------------------------------------------*/
index 19589be270ff7240b6409091b2ced6fa19f6c048..05de376f0e6180b32b72fdb9b86414acb17abb9f 100644 (file)
@@ -95,4 +95,6 @@
 #define CACR_STATUS                    (CFG_SYS_INIT_RAM_ADDR + \
                                        CFG_SYS_INIT_RAM_SIZE - 12)
 
+#define CFG_MCFTMR
+
 #endif /* __STMARK2_CONFIG_H */