ppc4xx: Minor updates for DU440 boards

Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>

diff --git a/board/esd/du440/du440.c b/board/esd/du440/du440.c
index ceb128c14881be221f1f2657869794878629fddc..3dbb2e135cc4df73a3e946cb25f8387647dfe25e 100644 (file)
--- a/board/esd/du440/du440.c
+++ b/board/esd/du440/du440.c
@@ -67,12 +67,12 @@ int board_early_init_f(void)
        out_be32((void*)GPIO1_OR, 0x00000000);
        out_be32((void*)GPIO1_TCR, 0xc2000000 |
                 CFG_GPIO1_IORSTN |
+                CFG_GPIO1_IORST2N |
                 CFG_GPIO1_LEDUSR1 |
                 CFG_GPIO1_LEDUSR2 |
                 CFG_GPIO1_LEDPOST |
                 CFG_GPIO1_LEDDU);
        out_be32((void*)GPIO1_ODR, CFG_GPIO1_LEDDU);
-
        out_be32((void*)GPIO1_OSRL, 0x5c280000);
        out_be32((void*)GPIO1_OSRH, 0x00000000);
        out_be32((void*)GPIO1_TSRL, 0x0c000000);
@@ -243,7 +243,8 @@ int misc_init_r(void)
         * release IO-RST#
         * We have to wait at least 560ms until we may call usbhub_init
         */
-       out_be32((void*)GPIO1_OR, in_be32((void*)GPIO1_OR) | CFG_GPIO1_IORSTN);
+       out_be32((void*)GPIO1_OR, in_be32((void*)GPIO1_OR) |
+                CFG_GPIO1_IORSTN | CFG_GPIO1_IORST2N);
 
        /*
         * flash USR1/2 LEDs (600ms)

diff --git a/board/esd/du440/du440.h b/board/esd/du440/du440.h
index 5c362e481873c746a0b445e7315c4b890ff1dd62..83fdac7c63fe85784efc0de32edc5faf1af1e135 100644 (file)
--- a/board/esd/du440/du440.h
+++ b/board/esd/du440/du440.h
@@ -24,6 +24,7 @@
 #define CFG_GPIO1_DCF77                (0x80000000 >> (42-32))  /* GPIO1_42 */
 
 #define CFG_GPIO1_IORSTN       (0x80000000 >> (55-32))  /* GPIO1_55 */
+#define CFG_GPIO1_IORST2N      (0x80000000 >> (47-32))  /* GPIO1_47 */
 
 #define CFG_GPIO1_HWVER_MASK   0x000000f0 /* GPIO1_56-59 */
 #define CFG_GPIO1_HWVER_SHIFT  4

diff --git a/include/configs/DU440.h b/include/configs/DU440.h
index 4fb6921eadebfb03aa8d835da9ab93abd1533a8b..f193a431d78167def6aeec39dce80b908df9bf9f 100644 (file)
--- a/include/configs/DU440.h
+++ b/include/configs/DU440.h
@@ -157,10 +157,9 @@
  */
 #define CFG_MBYTES_SDRAM        (1024) /* 512 MiB      TODO: remove    */
 #define CONFIG_DDR_DATA_EYE            /* use DDR2 optimization        */
+#define CFG_MEM_TOP_HIDE        (4 << 10) /* don't use last 4kbytes     */
+                                        /* 440EPx errata CHIP 11        */
 #define CONFIG_SPD_EEPROM              /* Use SPD EEPROM for setup     */
-#if 0
-#define CONFIG_ZERO_SDRAM              /* Zero SDRAM after setup       */
-#endif
 #define CONFIG_DDR_ECC                 /* Use ECC when available       */
 #define SPD_EEPROM_ADDRESS     {0x50}
 #define CONFIG_PROG_SDRAM_TLB
@@ -244,9 +243,6 @@
        "update=protect off FFFA0000 FFFFFFFF;era FFFA0000 FFFFFFFF;"   \
                "cp.b 100000 FFFA0000 60000\0"                          \
        ""
-#if 0
-#define CONFIG_BOOTCOMMAND     "run flash_self"
-#endif
 
 #define CONFIG_PREBOOT                  /* enable preboot variable      */
 
@@ -264,7 +260,7 @@ int du440_phy_addr(int devnum);
 #define CONFIG_PHY_ADDR                du440_phy_addr(0) /* PHY address        */
 
 #define CONFIG_PHY_RESET        1      /* reset phy upon startup       */
-#define CONFIG_PHY_GIGE                1       /* Include GbE detection        */
+#undef CONFIG_PHY_GIGE                 /* no GbE detection             */
 
 #define CONFIG_HAS_ETH0
 #define CFG_RX_ETH_BUFFER      128
@@ -295,7 +291,9 @@ int du440_phy_addr(int devnum);
 
 #include <config_cmd_default.h>
 
+#define CONFIG_CMD_AUTOSCRIPT
 #define CONFIG_CMD_BSP
+#define CONFIG_CMD_BMP
 #define CONFIG_CMD_DATE
 #define CONFIG_CMD_ASKENV
 #define CONFIG_CMD_DHCP
@@ -431,8 +429,6 @@ int du440_phy_addr(int devnum);
 #define CONFIG_KGDB_SER_INDEX  2       /* which serial port to use */
 #endif
 
-#if 0
-#define CONFIG_SHOW_ACTIVITY      1
-#endif
+#define CONFIG_AUTOSCRIPT      1
 
 #endif /* __CONFIG_H */